Xincheng Feng

dblp:284/3880 · DBLP profile ↗
← Back
6ranked-venue papers
4as first author
6since 2021 · last 2026
—ORCID · conflict

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 6 · 4 first-author · 6 since 2021Security and privacy · 1 · 1 since 2021
YearPublicationVenuePosition
2026 Activation-Free Implicit Neural Representation via Finite-State-Machine Based Stochastic Computing
abstract
Implicit neural representations (INRs) have revolutionized signal encoding by using neural networks to map coordinates to signal attributes. Despite their success, INRs present significant hardware implementation challenges due to complex activation functions and floating-point operations. Unlike previous efforts, such as model pruning or quantization, we address these challenges by introducing AIRFSC, a novel activationfree stochastic computing (SC) architecture that leverages finitestate machines (FSMs). AIRFSC eliminates complex activation functions and processes data efficiently through stochastic bitstreams. Our approach decomposes the input signal into a series of Fourier basis functions, enabling the FSM-based architecture to learn smooth coordinate-to-attribute mappings for accurate signal reconstruction. Extensive experiments on diverse signal types demonstrate that AIRFSC achieves reconstruction quality comparable to state-of-the-art (SOTA) INRs implemented with multi-layer perceptrons (MLPs), while significantly improving hardware efficiency. Specifically, AIRFSC reduces power and area by $\mathbf{9 6. 8 \%}$ and $\mathbf{7 2. 8 \%}$ compared to Sinusoidal Representation Networks (SIREN), and by 97.9% and 81.3% compared to Wavelet Implicit Representation (WIRE).
Xincheng Feng, Wenyong Zhou, Taiqiang Wu, Meng Li 0004, Zhengwu Liu, Ngai Wong 0001
ASP-DAC1
2026 From SMURF to HI-SMURF: Scalable Multivariate Nonlinear Function Approximation via Compact Stochastic Architectures
Xincheng Feng, Wenyong Zhou, Taiqiang Wu, Zhengwu Liu, Meng Li 0004, Ngai Wong 0001
IEEE Trans. Computers1
2026 Hardware-aware Low-Rank Adaptation for Large Language Models Based on Hybrid Compute-in-Memory Architecture
abstract
Low-rank adaptation (LoRA) is a predominant parameter-efficient finetuning method for adapting large language models (LLMs) to downstream tasks. Meanwhile, Compute-in-Memory (CIM) architectures demonstrate superior energy efficiency due to their array-level parallel in-memory computing designs. In this article, we propose deploying the LoRA-finetuned LLMs on the hybrid CIM architecture (i.e., pretrained weights onto energy-efficient Resistive Random-Access Memory (RRAM) and LoRA branches onto noise-free Static Random-Access Memory (SRAM)), reducing the energy cost to about 3% compared with the Nvidia A100 GPU. However, the inherent noise of RRAM on the saved weights leads to performance degradation, simultaneously. To address this issue, we design a novel Hardware-aware Low-rank Adaptation (HaLoRA) method. The key insight is to train a LoRA branch that is robust toward such noise and then deploy it on noise-free SRAM, while the extra cost is negligible since the parameters of LoRAs are much fewer than pretrained weights (e.g., 0.15% for LLaMA-3.2 1B model). To improve the robustness towards the noise, we theoretically analyze the gap between the optimization trajectories of the LoRA branch under both ideal and noisy conditions and further design an extra loss to minimize the upper bound of this gap. Therefore, we can enjoy both energy efficiency and accuracy during inference. Experiments finetuning the Qwen and LLaMA series demonstrate the effectiveness of HaLoRA across multiple reasoning tasks, achieving up to 22.7 improvement in average score while maintaining robustness at various noise types and noise levels.
Taiqiang Wu, Chenchen Ding, Wenyong Zhou, Yuxin Cheng, Xincheng Feng, Wendong Xu, Chufan Shi, Zhengwu Liu, Ngai Wong 0001
ACM Trans. Design Autom. Electr. Syst.5
2025 Stochastic Multivariate Universal-Radix Finite-State Machine: a Theoretically and Practically Elegant Nonlinear Function Approximator
abstract
Nonlinearities are crucial for capturing complex input-output relationships especially in deep neural networks. However, nonlinear functions often incur various hardware and compute overheads. Meanwhile, stochastic computing (SC) has emerged as a promising approach to tackle this challenge by trading output precision for hardware simplicity. To this end, this paper proposes a first-of-its-kind stochastic multivariate universal-radix finite-state machine (SMURF) that harnesses SC for hardware-simplistic multivariate nonlinear function generation at high accuracy. We present the finite-state machine (FSM) architecture for SMURF, as well as analytical derivations of sampling gate coefficients for accurately approximating generic nonlinear functions. Experiments demonstrate the superiority of SMURF, requiring only 16.07% area and 14.45% power consumption of Taylor-series approximation, and merely 2.22% area of look-up table (LUT) schemes.
Xincheng Feng, Guodong Shen, Jianhao Hu, Meng Li 0016, Ngai Wong 0001
ASP-DAC1
2023 Tabby: Automated Gadget Chain Detection for Java Deserialization Vulnerabilities
abstract
Java is one of the preferred options of modern developers and has become increasingly more prominent with the prevalence of the open-source culture. Thanks to the serialization and deserialization features, Java programs have the flexibility to transmit object data between multiple components or systems, which significantly facilitates development. However, the features may also allow the attackers to construct gadget chains and lead to Java deserialization vulnerabilities. Due to the highly flexible and customizable nature of Java deserialization, finding an exploitable gadget chain is complicated and usually costs researchers a great deal of effort to confirm the vulnerability. To break such a dilemma, in this paper, we introduced Tabby, a highly accurate framework that leverages the Soot framework and Neo4j graph database for finding Java deserialization gadget chains. We leveraged Tabby to analyze 248 Jar files, found 80 practical gadget chains, and received 7 CVE-IDs from Xstream and Apache Dubbo. They both improved the security design to deal with potential security risks.
Xingchen Chen, Baizhu Wang, Ze Jin, Yun Feng 0003, Xincheng Feng, Qixu Liu
DSN6
2022 MM-FSM$: $: A High-Efficiency General Nonlinear Function Generator for Stochastic Computation
abstract
AbstractNonlinear function calculation is widely used in numerous science and technology fields. Stochastic computation is a novel high-efficiency value representation and calculation scheme for information and signal processing. The main challenges of stochastic computation based nonlinear function implementation lie on poor generalization, low accuracy and high latency. In this paper, we propose a multiple driving and multiple dimension finite state machine (MM-FSM) to realize major single variable nonlinear functions used in information and signal processing areas on common platforms with low complexity and latency. We provide corresponding synthesis method of the activation parameters and conditional parameters of MM-FSM. In order to improve the calculation accuracy, we further propose an adaptive scaling algorithm for MM-FSM. The most salient feature of MM-FSM is that we can configure different types of nonlinear functions with the same MM-FSM structure. Thus, MM-FSM can be used in a wide range of stochastic based applications. Compared with the traditional stochastic scheme and Coordinate Rotation Digital Computer (CORDIC) algorithm, simulation results show that the proposed MM-FSM nonlinear function generator has significantly lower complexity while guaranteeing the calculation accuracy.
Xincheng Feng, Kaining Han
IEEE Trans. Computers1