EDBT 2026 Demo / reviewers in the wild / expert
Tomas Sousa Pereira
dblp:285/7046
· DBLP profile ↗
3ranked-venue papers
1as first author
3since 2021 · last 2026
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 3 · 1 first-author · 3 since 2021Applied, interdisciplinary, general and emerging computing · 1 · 1 first-author · 1 since 2021
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2026 | Codebook-Based Acceleration for Ternary Language Model Inference
Tomas Sousa Pereira, Ruibao Wang, Ikenna Nwozo, Xiaobo Sharon Hu |
ISLPED | 1 |
| 2026 | Enhancing Robustness of Content-Addressable Memories for In-Memory Search
Liu Liu 0023, Tomas Sousa Pereira, Mohammad Mehdi Sharifi, Can Li 0024, Kai Ni 0004, Michael T. Niemier, Xiaobo Sharon Hu |
VTS | 2 |
| 2025 | Invited Paper: Circuit and Architecture Design with Emerging Computing ParadigmsabstractAs emerging computing paradigms push beyond the limitations of traditional CMOS-based computing using Von Neumann architectures, there is a growing need to rethink and extend Electronic Design Automation (EDA) methodologies to support their unique characteristics. These paradigms—including Approximate Computing, In-Memory Computing, Reconfigurable Field-Effect Transistors (RFETs), and Photonic Computing—represent diverse and promising directions beyond conventional digital design. Collectively, they offer transformative potential for achieving significant improvements in energy efficiency, computational speed, and architectural scalability. For example, application-specific approximate computing enables the design of custom arithmetic circuits that exploit application-level error resilience, allowing for optimized accuracy–power–performance–area (PPA) trade-offs in error-tolerant applications. Similarly, processing-in-non-volatile memories, such as those based on Ferroelectric Field-effect Transistors (FeFETs), enhances energy efficiency by enabling analog computation—particularly for operations like matrix multiplication—directly within the memory arrays. The intrinsic polymorphism of RFETs supports compact, multifunctional logic gates and introduces new opportunities for circuit-level obfuscation and security-aware design. Likewise, photonic analog wavefront computing offers substantial gains in latency and energy efficiency by encoding and processing information in the analog optical domain, leveraging phenomena such as diffraction and interference to perform computation at the speed of light. However, they also introduce a host of new challenges in circuit and architecture design, such as vast and irregular design spaces, analog and non-Boolean behavior, and new device-level constraints that existing EDA tools are not capable of handling. To this end, the current article focuses on the development of efficient and robust EDA frameworks that can enable the practical realization of circuits and architectures in these emerging domains. Salim Ullah, Siva Satyendra Sahoo, Can Li 0024, Chao Li 0065, Liu Liu 0023, Tomas Sousa Pereira, Xunzhao Yin, Armin Darjani, Nima Kavand, Chakravarthy Bodla, Rupa Yashaswi Panduga, Aniruddh Holemadlu, Johannes Maly, Jonathan Förste, Samarth Vadia, Xiaobo Sharon Hu, Akash Kumar 0001 |
ICCAD | 6 |