The secure transmission of images in critical applications like smart healthcare and autonomous driving demands encryption schemes that are both highly secure and efficient. While chaos-based systems are promising, their security is fundamentally limited by the complexity of the underlying chaotic generator. This paper introduces a novel complex-valued discrete-time Hopfield neural network (CVDHNN) to address this challenge. We demonstrate that the CVDHNN exhibits rich hyperchaotic dynamics through various numerical analyses. The network is successfully implemented on an FPGA, verifying its capability for chaotic sequence generation. Leveraging this complex chaos, we design a robust image encryption algorithm that integrates multi-stage confusion and diffusion. Security analysis confirms the cipher’s excellence, achieving favorable statistical properties, high key sensitivity, and strong resistance to various attacks.

Memristors with nonlinearity and memory characteristics can effectively enhance chaotic dynamics complexity for chaotic maps. In this work, we present a novel discrete memristor model and couple it with sine maps and iterative chaotic maps with infinite collapse (ICMIC) to construct a class of discrete memristive hyperchaotic maps with multicavity multistructure attractors. This class of multicavity multistructure memristive sine ICMIC modulation maps (MCMS-MSIMMs) possesses an infinite variety of configurations, where the quantity and position of coupled discrete memristors can be arbitrarily combined. Numerical simulation results demonstrate that the sample map can exhibit hyperchaos, nondegeneracy, large-scale parameter control, multicavity attractors, multistructure attractors, and multicavity multistructure attractors. The complexity and initial values of the system are explored, revealing the high permutation entropy and initial offset-boosting behavior. In addition, the field programmable gate array (FPGA)-based MCMS-MSIMM hardware circuit is designed, and the experimental results are consistent with the numerical results. Finally, MCMS-MSIMM is applied in secure communication, and the experimental results indicate that the proposed map has better noise resistance performance compared to existing maps.

Nowadays, while enjoying the convenience brought by the Internet of Things (IoT), people are also facing significant challenges in information security. A stable and reliable random source is an indispensable component of IoT secure communication system. This paper explores the dynamics in a discrete neuron map influenced by the memristive delay feedback. The investigation considers feedback strength, delay length, and initial conditions as key parameters, and employs numerical analyses including phase diagrams, Lyapunov exponents, bifurcation diagrams, and Kaplan-Yorke dimensions, to explore the diverse dynamical behaviors of the discrete memristive delay feedback neuron model. The study uncovers an inherent connection between the complexity of the dynamic behavior and the control parameters, as well as the delay length. Further exploration into initial condition-dependent dynamics reveals the intricate coexistence of homogeneous and heterogeneous attractors. Furthermore, the proposed model is successfully implemented on an FPGA platform, with experimental results validating its feasibility and effectiveness, contributing to a deeper understanding of delay effects in discrete memristive neural systems. Moreover, the secure communication system is designed based on the memristive delay feedback neuron model. The performance against noise is evaluated through numerical simulations demonstrating its effectiveness in secure communication.

Most existing visual object tracking (VOT) approaches are implemented based on the von Neumann computation systems, which inevitably have the problems of high latency. Additionally, remote server processing of video resources requires a large amount of data transmission over the Internet, which limits real-time tracking performance. The integration of VOT technology into electronic devices has become a new trend. However, current VOT approaches have high algorithm complexity, making it difficult to design the circuits to implement the corresponding functions. In this article, a memristor-based attention network (MAN) and its corresponding algorithm are proposed to achieve online real-time tracking under parallel computing. Memristors are used to construct the attention encoding circuits to record changes of the target in historical frames, and adjust attention signals to the target online and in real-time during the tracking process, avoiding the latency problem of the von Neumann architecture. Inspired by the working process of$\gamma $-GABAergic interneuron and tripartite synapse, we propose an attention allocation module to selectively allocate attention values. Combining the winner-take-all principle, we design a target localization circuit and an optimal attention zone selection circuit for the parallel computation to track the location of the target. Finally, the experiments and analyses on the OTB-100, NFS, and VOT-RTb2022 benchmark datasets verify that the proposed MAN has promising tracking performance and achieves a tracking speed of 1000 frames per second, demonstrating superior real-time performance.

The brain emotional learning network offers several advantages when compared to traditional neural networks. It features a simpler structure, low computational complexity, and fast training speed. These characteristics make it ideal for applications like pattern recognition, data classification, and intelligent control. However, current brain emotional learning networks, including their modified networks, are not capable of recognizing or classifying data in complex environments. To address this issue, this paper proposes a brain emotional learning network with an attention mechanism that strengthens the processing of key information while suppressing interfering information, thereby enabling the network to recognize data within complex environments. Furthermore, software implementation of neural networks often experiences slow computing speeds due to the separation of storage and computation in traditional von Neumann computers. To combat this issue, the paper presents a hardware circuit implementation of the attention mechanism-based brain emotional learning network using memristors. Finally, the designed in-memory computing neural network has been successfully applied to the recognition of traffic signs within complex environments, and has achieved accurate and rapid recognition.

Memristors, with their unique nonlinear characteristics, are highly suitable for construction novel neural models with rich dynamic behaviors. In this paper, a memristor with piecewise nonlinear state function is introduced into the tabu learning neuron model, resulting in a novel memristive tabu learning neuron model capable of generating a double-wing chaotic butterfly. By modulating the state function of the memristor, we can effectively and easily alter the number of wings of the chaotic butterfly. Equilibrium points analysis further elucidates the mechanism behind the generation of multi-wing chaos. Various numerical simulation techniques, including phase portraits, bifurcation diagrams, Lyapunov exponent spectra, and local attraction basins, are employed to illustrate the dynamical behaviors of the proposed model. Moreover, the newly constructed neuron model is validated using FPGA hardware, with the results aligning with numerical simulations, thereby offering a dependable foundation for a memristor digital circuit-based brain-like neuron model. Lastly, an image encryption application based on the multi-wing chaotic butterfly is developed to demonstrate the potential application of the model.

The delay of state variable plays a crucial role in chaotic systems. However, it has not received sufficient attention in discrete memristor-based maps. This paper presents a study on the effects of delay feedback in the discrete memristive system, proposing a generalized delay difference feedback memristive map. The dynamical behaviors influenced by control parameters, delay length and initial conditions, are explored through four discrete memristive maps. The Kaplan-Yorke dimension is utilized as an indicator to investigate the chaotic dynamic variations induced by the delay length within memristive maps. Furthermore, digital circuits for the proposed systems are designed and implemented, with hardware experimental results that are consistent with numerical simulations, thereby verifying the effectiveness of the digital circuit-based system and providing a foundation for hardware-based delay difference system design. Additionally, the chaotic series are integrated into the particle swarm optimization for tackling obstacle avoidance path planning. The superiority of the designed delay difference feedback memristive maps is highlighted through comparisons with several classical chaotic maps, showcasing their enhanced performance in terms of the speed and cost efficiency in solving the path planning task.

The randomness of chaotic systems are crucial for their application in secure communication. Conservative systems exhibit enhanced ergodicity and randomness in comparison to dissipative chaotic systems. However, the memristor-based conservative chaotic maps remain unreported. This article presents a study of volume-preserving chaotic maps based on discrete memristor (DM). We propose and analyze a generic conservative map that incorporates DM. The conservative characteristics of the proposed iterative map are confirmed through the determinant of its Jacobian matrix. Furthermore, four distinct DM models are introduced and their memristive characteristics are verified through numerical simulations of hysteresis loops. To investigate the dynamical properties of the discrete memristive conservative map (DMCM), we incorporate the proposed DM models into the generic conservative map model using numerical methods, including phase portraits, Lyapunov exponents, and bifurcation diagrams. Additionally, the hardware implementation of the DMCM on an FPGA platform demonstrates the reliability of the model. Finally, secure communication experiments based on the DMCM show that it outperforms some classical dissipative chaotic maps in terms of bit error rate performance.

The high cost, low yield, and low stability of nanomaterials significantly hinder the application and development of memristors. To promote the application of memristors, researchers proposed a variety of memristor emulators to simulate memristor functions and apply them in various fields. However, these emulators lack nonvolatile characteristics, limiting their scope of application. This article proposes an innovative nonvolatile memristor circuit based on complementary metal–oxide–semiconductor (CMOS) technology, expanding the horizons of memristor emulators. The proposed memristor is fabricated in a reconfigurable array architecture using the standard CMOS process, allowing the connection between memristors to be altered by configuring theon–offstate of switches. Compared to nanomaterial memristors, the CMOS nonvolatile memristor circuit proposed in this article offers advantages of low manufacturing cost and easy mass production, which can promote the application of memristors. The application of the reconfigurable array is further studied by constructing an echo state network for short-term load forecasting in the power system.