Demo Data from EDBT 2026 / reviewers in the wild / expert
Aly Omar
dblp:286/8604
· DBLP profile ↗
1ranked-venue papers
0as first author
1since 2021 · last 2021
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1 · 1 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Distributed systems · 67% Processor architecture and microarchitecture · 33% |
Topics — the 3 heaviest of 3, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Processor architecture and microarchitecture
chip multiprocessor |
0.5 | 1 | 2021 | An Optimized Weighted Average Makespan in Fault-Tolerant Heterogeneous MPSoCs · IEEE Trans. Parallel Distributed Syst. 2021 |
Distributed systems › fault tolerance › fault-tolerant real-time systems
fault-tolerant scheduling |
0.5 | 1 | 2021 | An Optimized Weighted Average Makespan in Fault-Tolerant Heterogeneous MPSoCs · IEEE Trans. Parallel Distributed Syst. 2021 |
Distributed systems › replication
task replication |
0.5 | 1 | 2021 | An Optimized Weighted Average Makespan in Fault-Tolerant Heterogeneous MPSoCs · IEEE Trans. Parallel Distributed Syst. 2021 |
Methods — techniques the papers use, named apart from their topics
simulated annealing · 0.5list scheduling · 0.5
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2021 | An Optimized Weighted Average Makespan in Fault-Tolerant Heterogeneous MPSoCsabstractThe multiprocessor system on chips (MPSoCs) are considered today the core of most modern systems. Most of the applications of these heterogeneous MPSoCs include critical systems and hence terms of fault tolerance and reliability have become essential. Task replication is a technique to carry out fault tolerance and can help for reducing the schedule length by increasing locality. It introduces an upper and lower bound for the makespan of each schedule while each task is replicated more than once. If a fault occurs during execution, the expected makespan will be some value between the upper bound and the lower bound based on when and where the fault has occurred. In this research a new performance parameter namely the weighted average makespan is introduced. It is calculated as the average of the lower and upper bounds of makespan using the probability of occurrence of each. Two scheduling algorithms are presented for fault tolerant scheduling based on directed acyclic graphs. These algorithms are the list scheduling algorithm and the optimizing of the weighted average makespan based on simulated annealing method. The simulation results show that the techniques can improve the schedule length and increase the system reliability without compromising the performance. Hassan A. Youness, Aly Omar, Mohammed Moness |
IEEE Trans. Parallel Distributed Syst. | 2 |