Demo Data from EDBT 2026 / reviewers in the wild / expert
Robert C. Frye
dblp:29/1200
· DBLP profile ↗
5ranked-venue papers
4as first author
0since 2021 · last 2001
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Artificial intelligence and machine learning · 4 · 3 first-authorApplied, interdisciplinary, general and emerging computing · 1 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Integrated circuit design · 85% Electronic design automation · 15% |
Topics — the 4 heaviest of 5, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Integrated circuit design › analog and mixed-signal circuits
mixed-signal circuit design |
0.0 | 1 | 2001 | Integration and electrical isolation in CMOS mixed-signal wireless chips · Proc. IEEE 2001 |
Integrated circuit design
analog and mixed-signal circuits |
0.0 | 1 | 2001 | Integration and electrical isolation in CMOS mixed-signal wireless chips · Proc. IEEE 2001 |
Electronic design automation › physical design
lithography |
0.0 | 1 | 1990 | Proximity Effect Corrections in Electron Beam Lithography · NIPS 1990 |
Electronic design automation › physical design › lithography
electron beam lithography |
0.0 | 1 | 1990 | Proximity Effect Corrections in Electron Beam Lithography · NIPS 1990 |
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2001 | Integration and electrical isolation in CMOS mixed-signal wireless chipsabstractThe technological trends underlying the application of CMOS technology in wireless applications are leading to the integration of the RF analog functions and the digital baseband processing into a single chip. Two key technical requirements for this integration are the capability to fabricate high Q passive components and the need to maintain electrical isolation between analog and digital components in the resulting mixed-signal chip. Some basic arguments that illustrate the technological conflict between these two important demands are presented, focusing on their implications for the structure of the IC substrate. This structure and the characteristics of the device package play important robs in determining the levels of coupled ground noise that will be present in the mixed-signal IC. A simple, high-level model for coupled ground noise is presented and used to illustrate the impact of design alternatives for the package and for the IC substrate. Robert C. Frye |
Proc. IEEE | 1 |
| 1991 | Back-propagation learning and nonidealities in analog neural network hardwareabstractExperimental results from adaptive learning using an optically controlled neural network are presented. The authors have used example problems in nonlinear system identification and signal prediction, two areas of potential neural network application, to study the capabilities of analog neural hardware. These experiments investigated the effects of a variety of nonidealities typical of analog hardware systems. They show that network using large arrays of nonuniform components can perform analog communications with a much higher degree of accuracy than might be expected given the degree of variation in the network's elements. The effects of other common nonidealities, such as noise, weight quantization, and dynamic range limitations, were also investigated. Robert C. Frye, Edward A. Rietman, Chee C. Wong |
IEEE Trans. Neural Networks | 1 |
| 1990 | Computation of proximity effect corrections in electron beam lithography by a neural networkabstractThe proximity effect, caused by electron-beam backscattering during resist exposure, can be compensated for by appropriate local changes in the incident beam dose, but the optimal correction, found iteratively, requires a prohibitively long time for realistic pattern sizes. A neural network has been used to perform these corrections, resulting in a significant decrease in computation time. The correction was first computed for a small test pattern using an iterative method. This solution was used as a training set for an adaptive, feedforward neural network, using back-propagation learning. After training, the network computed the same correction as the iterative method, but in a much shorter time Robert C. Frye, Edward A. Rietman, Kevin D. Cummings |
IJCNN | 1 |
| 1990 | Proximity Effect Corrections in Electron Beam Lithography
Robert C. Frye, Kevin D. Cummings, Edward A. Rietman |
NIPS | 1 |
| 1988 | A large hybrid electro-optic computer for neural network applications
Cary D. Kornfeld, Robert C. Frye, Chee C. Wong, Edward A. Rietman |
Neural Networks | 2 |