EDBT 2026 Demo / reviewers in the wild / expert
Hiroshi Iwai
dblp:29/5506
· DBLP profile ↗
8ranked-venue papers
2as first author
0since 2021 · last 2016
—ORCID · conflict
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 2 · 1 first-authorApplied, interdisciplinary, general and emerging computing · 2 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Integrated circuit design · 100% |
Topics — the 6 heaviest of 6, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Integrated circuit design › emerging device technologies
nanowire FET |
0.1 | 1 | 2011 | Si nanowire FET and its modeling · Sci. China Inf. Sci. 2011 |
Integrated circuit design
semiconductor devices |
0.1 | 1 | 2011 | Si nanowire FET and its modeling · Sci. China Inf. Sci. 2011 |
Integrated circuit design › analog and mixed-signal circuits
device modeling |
0.0 | 1 | 2011 | Si nanowire FET and its modeling · Sci. China Inf. Sci. 2011 |
Integrated circuit design
analog and mixed-signal circuits |
0.0 | 1 | 1987 | Analysis of Velocity Saturation and Other Effects on Short-Channel MOS Transistor Capacitances · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1987 |
Integrated circuit design › analog and mixed-signal circuits › device modeling
MOS capacitance model |
0.0 | 1 | 1987 | Analysis of Velocity Saturation and Other Effects on Short-Channel MOS Transistor Capacitances · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1987 |
Integrated circuit design › semiconductor devices
short-channel effects |
0.0 | 1 | 1987 | Analysis of Velocity Saturation and Other Effects on Short-Channel MOS Transistor Capacitances · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1987 |
Methods — techniques the papers use, named apart from their topics
device modeling · 0.1two-dimensional device simulation · 0.0capacitance extraction · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2016 | Editor's note
Ru Huang 0001, Hiroshi Iwai, Cor Claeys, Simon Deleonibus, Runsheng Wang |
Sci. China Inf. Sci. | 2 |
| 2013 | Experiment on battery-less sensor activation via multi-point wireless energy transmissionabstractThis paper presents an indoor experiment to verify the battery-less sensor activation via multi-point wireless energy transmission with carrier shift diversity which realizes seamless coverage extension of the sensor activation. The multi-point scheme is employed to overcome path-loss attenuation. The carrier shift diversity has been developed to achieve uniform coverage of power transmission by combating standing-wave problem caused by multi-point transmitters as well as multipath waves, while its effectiveness on activation of battery-less sensors has never been studied in real environments. In this paper, we develop prototype hardware of battery-less sensor and conduct an indoor experiment with the developed sensor node. The experimental results show that the coverage of single-point and simple multi-point wireless energy transmission are limited at 44% and 70% respectively, while that of the proposed multi-point wireless energy transmission with carrier shift diversity achieves 100% to activate the developed sensor node which consumes -4 dBm for a transmission period of 1s. Daiki Maehara, Ryota Akai, Gia Khanh Tran, Kei Sakaguchi, Seiichi Sampei, Kiyomichi Araki, Hiroshi Iwai |
PIMRC | 7 |
| 2011 | Si nanowire FET and its modeling
Hiroshi Iwai, Kenji Natori, Kenji Shiraishi, Jun-ichi Iwata, Atsushi Oshiyama, Keisaku Yamada, Kenji Ohmori, Kuniyuki Kakushima, Parhat Ahmet |
Sci. China Inf. Sci. | 1 |
| 2007 | Effects of Received Power Imbalance on the Channel Capacity of a Handset MIMOabstractThis paper presents a basic investigation of the power imbalance problem using a dipole array and a handset MIMO model in a browsing situation. Using channel modeling that includes the effects of 3-dimensional angular spectrum and polarization of incident waves, we carried out a Monte Carlo simulation. From the results obtained in this study, estimates of the reduction in channel capacity for different numbers of elements with reduced received power can be made. Koichi Ogawa, Satoru Amari, Hiroshi Iwai, Atsushi Yamamoto |
PIMRC | 3 |
| 2006 | Performance Analysis of MIMO-OFDM Systems using Indoor Wideband MIMO Channel Measurement DataabstractIn this paper, throughput performance of MIMO-OFDM system in real residential home environment was evaluated by using wideband MIMO channel measurement data. Computer simulations were carried out to compare the performance of MIMO-OFDM systems with various detection methods, i.e. MMSE, VBLAST, QRM-MLD and SVD-MIMO, in addition to that of the SISO-OFDM system. The results showed that the SVD-MIMO transmission can provide the highest average and outage throughput under the assumption of perfect CSI feedback. On the other hand, QRM-MLD yielded the best performance among the systems without CSI available at the transmitter. It was also found that the outage throughput performance of MMSE and VBLAST degrades severely due to the existence of spatial correlation in the real home environment. Gia Khanh Tran, Nguyen Dung Dao, Kei Sakaguchi, Kiyomichi Araki, Hiroshi Iwai, Tsutomu Sakata, Koichi Ogawa |
VTC Spring | 5 |
| 2005 | Measurements on Area Coverage of 5GHZ Band MIMO-OFDM System in Residential Home EnvironmentabstractAn area coverage of 4×4 MIMO-OFDM system was measured in residential home environment at 5GHz band. A novel spatial scanner was fabricated to suit the needs of measurements in environments with household furniture such as beds, sofa and tables. The coverage was calculated based on a total of 55,000 spatial samples in an area of 150m2which includes two rooms, a hallway and living and dining areas. The results shown that the 4×4 MIMO system can greatly increase the area coverage compared to SISO system, especially at high data rate. It was also found that the introduction of optimum power allocation in the MIMO system is effective to increase area boundary with lower data rate. Nguyen Dung Dao, Hai-Yeow-Eugene Chua, Kei Sakaguchi, Kiyomichi Araki, Hiroshi Iwai, Tsutomu Sakata, Koichi Ogawa |
PIMRC | 5 |
| 1989 | A manufacturing-oriented environment for synthesis of fabrication processesabstractThe process design aid (PDA), a design environment which bridges the gap between design and specification of semiconductor fabrication processes, is presented. The PDA uses a hierarchical process model supporting reuse of well-characterized process fragments; integrates design goals with process and simulation data in a single knowledge base; and provides direct support for the numerical optimization of process parameters and simulator calibration parameters. Details of a hierarchical, object-oriented process representation are discussed. Results of modeling a 0.8- mu m BiCMOS process with the PDA are presented, demonstrating automatic generation of consistent simulation and manufacturing specifications, efficient incremental simulation, and fast, interactive, closed-loop optimization of process parameters.> John S. Wenstrand, Hiroshi Iwai, Robert W. Dutton |
ICCAD | 2 |
| 1987 | Analysis of Velocity Saturation and Other Effects on Short-Channel MOS Transistor CapacitancesabstractIn order to analyze short-channel effects of MOS transistor ac characteristics, a two-dimensional device simulator has been used to extract MOS transistor capacitances. The results of simulation and measurements agree well. The causes of short-channel effects have been understood and explained by the simulations. Two-dimensional effects and velocity saturation are the main causes of short-channel effects in MOS transistor capacitances. Two-dimensional simulation was found to be a useful tool for studying mobility models, as well as for obtaining capacitance models for circuit simulation. Hiroshi Iwai, Mark R. Pinto, Conor S. Rafferty, J. E. Oristian, Robert W. Dutton |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 1 |