EDBT 2026 Demo / reviewers in the wild / expert
Dongyan Wang
dblp:29/6094
· DBLP profile ↗
13ranked-venue papers
0as first author
11since 2021 · last 2025
—ORCID · conflict
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 6 · 6 since 2021Artificial intelligence and machine learning · 2 · 2 since 2021Software engineering, systems software and programming languages · 2 · 2 since 2021Databases, data management, data science and information retrieval · 1 · 1 since 2021Graphics, computer vision, multimedia, augmented reality and games · 1
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2025 | Cross-domain representation learning with causal invariance
Dianlong You, Dongyan Wang, Xiaoyi Ge, Zhen Chen 0007, Xindong Wu 0001 |
Eng. Appl. Artif. Intell. | 3 |
| 2025 | Escaping posterior collapse: Enhancing variational autoencoders with vine copulas
Dianlong You, Xiaoyi Ge, Chuan Lu, Dongyan Wang, Shunfu Jin, Zhi-Lin Zhao 0001 |
Inf. Sci. | 4 |
| 2025 | Disentangle Representation Learning with Excluding Confounding Bias for causal effect estimation
Dianlong You, Dongyan Wang, Xiaoyi Ge, Di Wu 0056, Xindong Wu 0001 |
Knowl. Based Syst. | 2 |
| 2024 | CFTCG: Test Case Generation for Simulink Model through Code Based FuzzingabstractSimulink is extensively utilized in system design for its ability to facilitate modeling and synthesis of embedded controllers. It provides automatic test case generation to assist testers in inspecting the model. However, with the continuous increase in the model's scale, the control logic and internal states of the model are becoming more and more complex. Mainstream test case generation methods based on constraint solving and model simulation face challenges in achieving high coverage metrics. Zhuo Su 0005, Zehong Yu, Dongyan Wang, Rui Wang 0024, Yu Jiang 0001 |
DAC | 3 |
| 2024 | Test Case Generation for Simulink Models using Model Fuzzing and State SolvingabstractSimulink plays an important role in the industry for modeling and synthesis of embedded systems. Ensuring system stability requires using numerous test cases to validate the functionality and safety of the models. However, as requirements increase, the complexity of the models poses new challenges to traditional testing methods. Traditional methods such as constraint solving and random search run into significant obstacles when navigating the complex branching logic and states within models. Zhuo Su 0005, Zehong Yu, Dongyan Wang, Wanli Chang 0001, Bin Gu 0006, Yu Jiang 0001 |
ASE | 3 |
| 2024 | HSTCG: State-Aware Simulink Model Test Case Generation With Heuristic StrategyabstractSimulink has gained widespread recognition as a valuable tool for system design. As systems grow increasingly complex, particularly in terms of their internal states, this complexity poses new challenges for existing model testing methodologies. Traditional techniques such as constraint solving and random search encounter difficulties when attempting to explore the intricate logic embedded within these models. In this paper, we introduceHSTCG, a state-aware test case generation method for Simulink models with heuristic strategy.HSTCGsolves only one iteration of the model each time to get the test input that can cover a target branch, then executes the model once to obtain and update the new model state based on the solved input dynamically. Then, it solves the remaining branches based on the new model state iteratively until all the coverage requirements are satisfied. To improve the efficiency of test case generation, we also designed a heuristic strategy containing heuristic branch searching, repeated state filter and unreached branch filter to minimize the times of constraint solving. We implementedHSTCGand evaluated it on several benchmark Simulink models. Compared to the built-in Simulink Design Verifier and state-of-the-art academic work SimCoTest,HSTCGachieves an average improvement of 55% and 103% on Decision Coverage, 53% and 62% on Condition Coverage and 192% and 201% on Modified Condition Decision Coverage, respectively. We also validated the significant improvement of the heuristic strategy, which can improve the efficiency of test case generation by 62.2% on average. Zhuo Su 0005, Zehong Yu, Dongyan Wang, Yixiao Yang, Rui Wang 0024, Wanli Chang 0001, Aiguo Cui, Yu Jiang 0001 |
IEEE Trans. Software Eng. | 3 |
| 2023 | STCG: State-Aware Test Case Generation for Simulink ModelsabstractSimulink has been widely used in system design, which supports the efficient modeling and synthesis of embedded controllers, with automatic test case generation to simulate and validate the correctness of the constructed Simulink model. However, the increasing complexity of the model, especially the internal states, brings extra challenges to existing model testing techniques such as constraint solving and random search, which results in difficulties when trying to reach the deeper logic of the model effectively.In this paper, we propose STCG, a state-aware test case generation method for Simulink models. STCG solves only one iteration of the model each time to get the test input that can cover a target branch, then executes the model once to obtain and update the novel model state based on the solved input dynamically. Then, it solves the remaining branches based on the new model state iteratively until all the coverage requirements are satisfied. We implemented STCG and evaluated it on several benchmark Simulink models. Compared to the built-in Simulink Design Verifier and state-of-the-art academic work SimCoTest, STCG achieves an average improvement of 58% and 132% on Decision Coverage, 52% and 70% on Condition Coverage and 239% and 237% on Modified Condition Decision Coverage, respectively. Zhuo Su 0005, Zehong Yu, Dongyan Wang, Yixiao Yang, Rui Wang 0024, Wanli Chang 0001, Aiguo Cui, Yu Jiang 0001 |
DAC | 3 |
| 2023 | PHCG: Optimizing Simulink Code Generation for Embedded System With SIMD InstructionsabstractSimulink is widely used for the model-driven design of embedded systems. It is able to generate optimized embedded control software code through expression folding, variable reuse, etc. However, for some commonly used computing-sensitive models, such as the models for signal processing applications, the efficiency of the generated code is still limited. In this article, we propose PHCG, an optimized code generator for the Simulink model with single-instruction–multiple-data (SIMD) instruction synthesis. It will select the optimal implementations for intensive computing actors based on adaptively precalculation of the input scales, and synthesize the appropriate SIMD instructions for batch computing actors based on the iterative dataflow graph mapping. In addition, actors of the same type that can be executed in parallel can be combined into batch computing actors as much as possible by merging isomorphic subgraphs. We implemented and evaluated its performance on benchmark Simulink models. Compared to the built-in Simulink Coder and the most recent DFSynth, the code generated by PHCG achieves an improvement of 38.9%–92.9% and 41.2%–76.8% in terms of execution time across different architectures and compilers, respectively. Zhuo Su 0005, Dongyan Wang, Zehong Yu, Yixiao Yang, Yu Jiang 0001, Rui Wang 0024, Wanli Chang 0001, Aiguo Cui, Jia-Guang Sun 0001 |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 2 |
| 2022 | HCG: optimizing embedded code generation of simulink with SIMD instruction synthesisabstractSimulink is widely used for the model-driven design of embedded systems. It is able to generate optimized embedded control software code through expression folding, variable reuse, etc. However, for some commonly used computing-sensitive models, such as the models for signal processing applications, the efficiency of the generated code is still limited. Zhuo Su 0005, Zehong Yu, Dongyan Wang, Yixiao Yang, Yu Jiang 0001, Rui Wang 0024, Wanli Chang 0001, Jia-Guang Sun 0001 |
DAC | 3 |
| 2022 | Code Synthesis for Dataflow-Based Embedded Software DesignabstractModel-driven methodology has been widely adopted in embedded software design, and Dataflow is a widely used computation model, with strong modeling and simulation ability supported in tools such as Ptolemy. However, its code synthesis support is quite limited, which restricts its applications in real industrial practice. In this article, we focus on the automatic code synthesis of Dataflow, and implementDFSynth, a code generator that could support most of the widely used modeling features, such as the expression type and Boolean switch, more efficiently. First, we disassemble the Dataflow model into actors embedded in if-else or switch-case statements based on the schedule analysis, which bridges the semantic gap between the code and the original Dataflow model. Then, we design well-designed templates for each actor, and synthesize well-structured executable C and Java codes with sequential code assembly. Compared to the existing C and Java code generators of Dataflow model in Ptolemy-II, and the C code generator in Simulink, the lines of code synthesized byDFSynthare decreased by an average of 99.7%, 81.4%, and 61.9%, and the execution time of the synthesized code byDFSynthis also decreased by an average of 76.2%, 56.8%, and 22.7%, respectively. Zhuo Su 0005, Dongyan Wang, Yixiao Yang, Yu Jiang 0001, Wanli Chang 0001, Liming Fang 0001, Jia-Guang Sun 0001 |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 2 |
| 2022 | MDD: A Unified Model-Driven Design Framework for Embedded Control SoftwareabstractModel-driven methods are widely used in embedded control software development. Current design tools, such as Ptolemy-II and Simulink, have strong modeling capability but their simulation and code generation functionalities are challenged by the increasing complexity of control requirements. For simulation, emulating the triggering of the actor leads to additional time overhead and speed degradation. For code generation, generating redundant content degrades the code quality. Besides, current tools do not have a unified interface, which makes it difficult to cooperation. In this article, we propose a unified model-driven design framework MDD to facilitate embedded control software development. MDD can support the unification of models built by different modeling tools for high-efficiency simulation and high-quality code generation. The MDD framework supports the expansion of more modeling tools, and also supports the expansion of more uses, such as unified testing and verification. First, it offers a model intermediate representation (MIR) and several corresponding parsers, which facilitate a unified representation and cooperation for different design tools. Then, based on data flow schedule analysis of the original MIR, intermediate code representation will be generated for optimized code synthesis. Finally, a variety of code translators will synthesize the intermediate code representation into the code of actual use, such as code for simulation and code for deployment. For evaluation, we enhance two widely used design tools in industry, Ptolemy-II and Simulink, and apply them on the implementation of several benchmark models and a real-world self-driving control software of our industrial collaborator. Using MDD can help reduce their simulation time by 98.9% and 92.6%, the generated code by 99.7% and 69.9% in the number of lines, and 94.3% and 34.3% in code execution time, respectively. Zhuo Su 0005, Dongyan Wang, Yixiao Yang, Zehong Yu, Wanli Chang 0001, Aiguo Cui, Yu Jiang 0001, Jia-Guang Sun 0001 |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 2 |
| 2019 | Blockchain Enabled Distributed Cooperative D2D CommunicationsabstractIn this paper, we propose a blockchain (BC)-enabled relay selection method in distributed cooperative communication networks, where non-cell-edge users (NCEUs) consume transmit power to relay cell edge users (CEUs) for uplink transmission in exchange for payments from CEUs. The proposed BC-enabled relay selection method aims at eliminating the failure of cooperative device to device (D2D) communication while maintaining privacy protection. By exploiting BC in the probe-reply phase, both CEU request and NCEU reply messages can be recorded in a verifiable manner. Once the feedback messages are received, the next step is decision making, which can be implemented by a two-sided matching game, in which the players include the CEUs party and the NCEUs one. In addition, the information recorded on the BC contains not only the probe-reply messages but also the optimal matching profile (e.g., transmission power sequence of NCEUs and the corresponding payment sequence of CEUs) in the second phase. The simulation results show that the proposed method is improved compared with the traditional matching scheme. Yulan Gao, Mingming Wu, Yue Xiao 0001, Ping Yang 0005, Dongyan Wang |
ISNCC | 6 |
| 1998 | A wavelet-based multiresolution statistical model for textureabstractA multiresolution statistical model, consisting of random fields in wavelet subbands, is proposed for texture, and has produced promising results in texture synthesis experiments. The basic idea here is that a complex random field model, e.g., one that contains long-range and nonlinear spatial correlations, can be constructed from several simpler ones. Jun Zhang 0006, Dongyan Wang, Que N. Tran |
IEEE Trans. Image Process. | 2 |