This paper presents a miniaturized, wideband, and optically transparent antenna with high efficiency, designed using the optimized wired metal mesh (WMM) for Internet of Things (IoT) applications. The performance of transparent antennas based on conductive oxides (TCOs) or metal meshes (MMs) is fundamentally determined by the optical transparency (OT) and sheet resistance (SR) of the material. Although OT and SR can be tuned using various fabrication techniques, conventional SR values provided by existing studies do not accurately represent the loss behavior at GHz frequencies. In this paper, an effective SR material model for the WMM is developed with consideration of high-frequency losses and applied in electromagnetic (EM) simulations. Using this model, the proposed antenna is systematically designed to achieve an impedance bandwidth of 66.3% and peak total efficiency of 92.4% over 2.61-5.2 GHz, in a compact 55×40 mm2 form. In addition to intrinsic antenna performance, practical robustness is evaluated under bending deformation, temperature variation, and indoor propagation environments. In the indoor scenarios having multipath effects, Error vector magnitude measurements at 3.5 GHz and 5.15 GHz demonstrated its suitability for IoT communication environments.

This paper presents a$200\times 232$CMOS indirect time-of-flight (iToF) sensor with an adaptive multiple sampling scheme that adjusts the number of samplings depending on the signal level for suppressing depth noise. A 10-b column-parallel single-slope analog-to-digital converter (SS-ADC) with five folded ramps is proposed to improve signal quality in the digital domain by sampling pixel voltages multiple times. The appropriate ramp is selected based on the signal level, and the optimal number of samplings is proceeded, enhancing overall efficiency. As the number of folding in the ramps is doubled in consecutive order while the range of the subsequent ramp is half of the previous one, the conversion time of the proposed SS-ADC is constant regardless of the ramp choice. In addition, the sensor incorporates an on-chip foreground calibration to mitigate the nonlinearity stemming from the mismatch of multiple ramps. The calibration is achieved by modifying the capacitance of the ramp generators. The prototype iToF sensor fabricated in a 110 nm BSI process achieves depth images from 0.6 m to 6.0 m with a high depth precision of 0.72% at 25 MHz modulation frequency and 60 fps without any frame rate degradation. The foreground calibration is successfully demonstrated by improving DNL errors smaller than ±0.7 LSB.

This paper presents a flash LiDAR system based on successive approximation (SA) in-pixel histogramming time-to-digital converter (hTDC) featuring pulse position modulation (PPM) to suppress interference from other light sources. The pulse position is randomly shifted with the start time of the hTDC, spreading out interference equally to both bins and canceling it by the up-down counting with no demodulation process. The PPM modulator is implemented in an FPGA with a flash LiDAR sensor and is fully characterized. The proposed SA-based PPM successfully attenuates 16-fold larger interference than the user’s optical power, achieving a frame rate of 30 fps and a success rate of 99.9% at the same time.

A CMOS indirect time-of-flight (iToF) sensor with a multiple sampling scheme for suppressing depth noise is presented. A 10-b column-parallel single-slope analog-to-digital converter (SS-ADC) with five folded ramps is proposed to sample pixel voltages several times, improving signal quality in the digital domain. A conversion time is constant regardless of the ramps because the number of folding in the ramps is dependent on the signal level. In addition, a foreground calibration for matching the ramp slopes is conducted on a chip, enhancing linearity. The prototype iToF sensor fabricated in a 110-nm BSI process achieves a high depth precision of 0.72% from 0.6 m to 6.0 m at 25 MHz modulation frequency.

Multiscale dynamics of neural and metabolic interactions implicated in disease states call for precision electrophysiology to resolve a variety of biopotential signals across the body that cover a wide range of frequencies, from the mHz-range electrogastrogram (EGG) to the kHz-range electroneurogram (ENG). Currently available integrated systems for unobtrusive and minimally invasive electrophysiology suffer from tradeoffs between bandwidth coverage, noise floor, power consumption, and input impedance, which limits their detection range and accuracy. Here we present a 16-channel wide-band ultra-low-noise neural recording system-on-chip fabricated in 65nm CMOS for chronic use in mobile healthcare settings that covers 0.001 Hz to 1 kHz bandwidth through sample-level duty-cycling. Each channel consists of a delta-sigma analog-to-digital converter (ADC) achieving$\mathbf{1.0}\ \mu \mathbf{V}_{rms}$input-referred noise over 1 Hz - 1 kHz bandwidth with a Noise Efficiency Factor (NEF) of 2.93 in continuous operation mode, while power duty-cycling of the biasing and clocks maintains consistent low input-referred noise levels down to 0.001 Hz sampling rates at$\mathbf{435}\ \mathbf{M}\Omega$input impedance. In vivo recordings from the chip interfacing to electrodes mounted on the forehead resolving slow-wave electroencephalogram (EEG) biopotentials demonstrate proof-of-concept functionality.

We present a low-power indirect time-of-flight (iTOF) image sensor with fixed depth noise compensation and dual-mode imaging for depth dynamic range (DDR) enhancement. To reduce the power consumption from high-frequency pixel modulation, a TX driver with a single-sided clock chain is employed in the sensor. The inherent phase delay of the clock chain and the delay of the row bus are measured using row-parallel and column-parallel time-to-digital converters (TDCs) to compensate for the column and row fixed depth noise (FDN). To achieve a wide depth dynamic range (WDDR), the reconfigurable pixels and column circuits support dual-mode: short-range (SR) and long-range (LR) modes. A WDDR image is generated in a single frame through the mixed reconfiguration of the pixel array and interpolation. In addition, the temporal noise is suppressed without a significant time budget through a fast multiple sampling (FMS) scheme with 10b successive approximation register (SAR) analog-to-digital (ADCs). A prototype iTOF image sensor was fabricated using a 110 nm frontside illumination (FSI) CMOS image sensor (CIS) process and fully characterized. The sensor achieved a DDR of 4 m (0.7 to 4.7 m) with less than 1.7% nonlinearity and 0.9% depth noise. The FDN was suppressed to less than 2.1 cm at a low power consumption below 70 mW through the proposed compensation scheme using row and column TDCs. The temporal noise was only 0.48 mV$_{\mathbf {rms}}$owing to the FMS.

BACKGROUND: The first Korean individual diploid genome sequence data (KOREF) was publicized in December 2008. RESULTS: A Korean genome variation analysis and browsing server (Gevab) was constructed as a database and web server for the exploration and downloading of Korean personal genome(s). Information in the Gevab includes SNPs, short indels, and structural variation (SV) and comparison analysis between the NCBI human reference and the Korean genome(s). The user can find information on assembled consensus sequences, sequenced short reads, genetic variations, and relationships between genotype and phenotypes. CONCLUSION: This server is openly and publicly available online at http://koreagenome.org/en/ or directly http://gevab.org.