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Adrien Panhaleux

dblp:29/8569 · DBLP profile ↗
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4ranked-venue papers
0as first author
0since 2021 · last 2011
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 4

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Processor architecture and microarchitecture · 75% Integrated circuit design · 25%
Theoretical computer science
1 paper
Mathematical optimization · 100%

Topics — the 3 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Processor architecture and microarchitecture › computer arithmetic
floating-point arithmetic
0.222011
Performing Arithmetic Operations on Round-to-Nearest Representations · IEEE Trans. Computers 2011
Midpoints and Exact Points of Some Algebraic Functions in Floating-Point Arithmetic · IEEE Trans. Computers 2011
Processor architecture and microarchitecture
computer arithmetic
0.112011
Performing Arithmetic Operations on Round-to-Nearest Representations · IEEE Trans. Computers 2011
Integrated circuit design › digital arithmetic circuits › floating-point unit design
rounding
0.112011
Performing Arithmetic Operations on Round-to-Nearest Representations · IEEE Trans. Computers 2011

Methods — techniques the papers use, named apart from their topics

algebraic function analysis · 0.2IEEE 754-2008 formats · 0.2
YearPublicationVenuePosition
2011 Midpoints and Exact Points of Some Algebraic Functions in Floating-Point Arithmetic
abstract
When implementing a function f in floating-point arithmetic, if we wish correct rounding and good performance, it is important to know if there are input floating-point values x such that f(x) is either the middle of two consecutive floating-point numbers (assuming rounded-to-nearest arithmetic), or a floating-point number (assuming rounded toward ± ∞ or toward 0 arithmetic). In the first case, we say that f(x) is a midpoint, and in the second case, we say that f(x) is an exact point. For some usual algebraic functions and various floating-point formats, we prove whether or not there exist midpoints or exact points. When there exist midpoints or exact points, we characterize them or list all of them (if there are not too many). The results and the techniques presented in this paper can be used in particular to deal with both the binary and the decimal formats defined in the IEEE 754-2008 standard for floating-point arithmetic.
Claude-Pierre Jeannerod, Nicolas Louvet, Jean-Michel Muller, Adrien Panhaleux
IEEE Trans. Computers4
2011 Performing Arithmetic Operations on Round-to-Nearest Representations
abstract
During any composite computation, there is a constant need for rounding intermediate results before they can participate in further processing. Recently, a class of number representations denoted RN-Codings were introduced, allowing an unbiased rounding-to-nearest to take place by a simple truncation, with the property that problems with double-roundings are avoided. In this paper, we first investigate a particular encoding of the binary representation. This encoding is generalized to any radix and digit set; however, radix complement representations for even values of the radix turn out to be particularly feasible. The encoding is essentially an ordinary radix complement representation with an appended round-bit, but still allowing rounding-to-nearest by truncation, and thus avoiding problems with double-roundings. Conversions from radix complement to these round-to-nearest representations can be performed in constant time, whereas conversion the other way, in general, takes at least logarithmic time. Not only is rounding-to-nearest a constant time operation, but so is also sign inversion, both of which are at best log-time operations on ordinary two's complement representations. Addition and multiplication on such fixed-point representations are first analyzed and defined in such a way that rounding information can be carried along in a meaningful way, at minimal cost. The analysis is carried through for a compact (canonical) encoding using two's complement representation, supplied with a round-bit. Based on the fixed-point encoding, it is shown possible to define floating-point representations, and a sketch of the implementation of an FPU is presented.
Peter Kornerup, Jean-Michel Muller, Adrien Panhaleux
IEEE Trans. Computers3
2010 Implementing decimal floating-point arithmetic through binary: Some suggestions
abstract
We propose algorithms and provide some related results that make it possible to implement decimal floating-point arithmetic on a processor that does not have decimal operators, using the available binary floating-point functions. In this preliminary study, we focus on round-to-nearest mode only. We show that several functions in decimal32 and dec-imal64 arithmetic can be implemented using binary64 and binaryl28 floating-point arithmetic, respectively. We discuss the decimal square root and some transcendental functions. We also consider radix conversion algorithms.
Nicolas Brisebarre, Nicolas Louvet, Érik Martin-Dorel, Jean-Michel Muller, Adrien Panhaleux, Milos D. Ercegovac
ASAP5
2010 Newton-Raphson algorithms for floating-point division using an FMA
abstract
Since the introduction of the Fused Multiply and Add (FMA) in the IEEE-754-2008 standard for floatingpoint arithmetic, division based on Newton-Raphson's iterations becomes a viable alternative to SRT-based divisions. The Newton-Raphson iterations were already used in some architecture prior to the revision of the IEEE-754 norm. For example, Itanium architecture already used this kind of iterations. Unfortunately, the proofs of the correctness of binary algorithms do not extend to the case of decimal floating-point arithmetic. In this paper, we present general methods to prove the correct rounding of division algorithms using Newton-Raphson's iterations in software, for radix 2 and radix 10 floating-point arithmetic.
Nicolas Louvet, Jean-Michel Muller, Adrien Panhaleux
ASAP3