EDBT 2026 Demo / reviewers in the wild / expert
Jiecheng Zhong
dblp:290/7545
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3ranked-venue papers
1as first author
3since 2021 · last 2021
0000-0002-4716-362XORCID · corroborated
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 3 · 1 first-author · 3 since 2021
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2021 | Millimeter-Wave Integrated Phased ArraysabstractLarge-scale millimeter-wave (mm-Wave) integrated phased array is the key technology to enable broadband 5G and satellite communications. This paper details the design considerations, challenges and trade-offs of mm-Wave integrated phased arrays based on bulk CMOS and multi-layer hybrid PCB technologies. Both technologies attain high yield and low cost for mass production. Important beamforming building blocks are addressed and compared in detail. Demonstrators of integrated phased arrays are presented from circuit to board levels. The 1024- and 4096-element integrated phased arrays achieve the EIRP of 72.5 and 84.0 dBm respectively. Finally, relevant phased-array transceivers and antennas from the recent literature are discussed. Dixian Zhao, Peng Gu 0004, Jiecheng Zhong, Na Peng, Mengru Yang, Yongran Yi, Jiajun Zhang 0002, Pingyang He, Zhi Chen 0002, Xiaohu You 0001 |
IEEE Trans. Circuits Syst. I Regul. Pap. | 3 |
| 2021 | Corrections to "Millimeter-Wave Integrated Phased Arrays" [early access, Jul 12, 21 doi: 10.1109/TCSI.2021.3093093]
Dixian Zhao, Peng Gu 0004, Jiecheng Zhong, Na Peng, Mengru Yang, Yongran Yi, Jiajun Zhang 0002, Pingyang He, Xiaohu You 0001 |
IEEE Trans. Circuits Syst. I Regul. Pap. | 3 |
| 2021 | A Ku-Band CMOS Power Amplifier With Series-Shunt LC Notch Filter for Satellite CommunicationsabstractThis article presents a Ku-band power amplifier with a series-shunt LC notch filter in 65-nm CMOS. The notch filter is integrated into the inter-stage matching network to attenuate the receiver-band noise, thereby reducing transmitter-to-receiver interference. A comprehensive analysis of the series and the shunt notch filters, as well as the position to apply the notch filter is discussed. Besides, a systematic method of optimizing passive devices in the notch filter is proposed to further improve network Q and minimize the influence on the power amplifier. Fabricated in 65-nm CMOS technology, the power amplifier prototype delivers a measured gain of 21.9 dB with 3-dB bandwidth from 13.7 GHz to 16.7 GHz at the nominal state. At 14.2 GHz, it can offer a saturated output power of 14.5 dBm with peak power added efficiency of 24.1%. The notch frequency is adjustable from 10.3 to 11.9 GHz to offer the best attenuation at the receiver band. From 10 to 12 GHz, a maximal attenuation of 30 dB is achieved. The design occupies a core area of 0.35×0.85 mm2. Jiecheng Zhong, Dixian Zhao, Xiaohu You 0001 |
IEEE Trans. Circuits Syst. I Regul. Pap. | 1 |