To generate physical quantum circuits, quantum gates are often added to the quantum circuit to satisfy the hardware constraints. This process is called quantum circuit mapping. Noise-aware mapping techniques generate physical quantum circuits for noisy intermediate-scale quantum (NISQ) computers. However, the absence of an accurate noise model of the quantum hardware limits its performance. In this article, we propose a noise adaptive quantum circuit mapping approach using reinforcement learning (RL) and graph neural network (GNN)-based reliability predictor. Our RL agent learns a quantum circuit mapping policy that significantly improves the quantum circuit output fidelity by interacting with the environment, which adopts a GNN reliability model that acts as quantum hardware and estimates the physical quantum circuit fidelity. Furthermore, we propose a multi-GNN reliability model to speed up the inference while maintaining high accuracy. Our proposed RL framework fills the gap between the simplified reliability models of the quantum hardware and the realistic noise impact of the quantum hardware on the quantum circuits. We demonstrate the improvement in the output fidelity of quantum circuits generated using our approach compared to other quantum circuit mapping techniques across different real-world quantum hardware using multiple-seed experiments.

The current advancement in quantum computers has been focusing on increasing the number of qubits and enhancing their fidelity. However, the available quantum devices, known as intermediate scale quantum (NISQ) computers, still suffer from different sources of noise that impact their reliability. Thus, practical noise modeling is of great importance in the development of quantum error mitigation approaches. In this article, we propose a machine learning (ML)-based scheme to predict the output fidelity of the quantum circuit executed on NISQ devices. We show the benefit of using graph neural network (GNN)-based models compared to traditional ML-based models in capturing the quantum circuit structure in addition to its gates’ features, which enable characterizing unpredicted quantum circuit errors. We use different metrics to measure the fidelity of the quantum circuit output. Our experimental results using different quantum algorithms executed on IBM Q Guadalupe quantum computer show the high prediction accuracy of our ML reliability models. Our results also show that our models can guide the single-qubit gate rescheduling to improve the output fidelity of the quantum circuit without the need for prior execution of dedicated calibration circuits.

Dynamical Decoupling (DD)-based protocols have been shown to reduce the idling errors encountered in quantum circuits. However, the current research in suppressing idling qubit errors suffers from scalability issues due to the large number of tuning quantum circuits that should be executed first to find the locations of the DD sequences in the target quantum circuit, which boost the output state fidelity. This process becomes tedious as the size of the quantum circuit increases. To address this challenge, we propose a Graph Neural Network (GNN) framework, which mitigates idling errors through an efficient insertion of DD sequences into quantum circuits by modeling their impact at different idle qubit windows. Our paper targets maximizing the benefit of DD sequences using a limited number of tuning circuits. We propose to classify the idle qubit windows into critical and non-critical (benign) windows using a data-driven reliability model. Our results obtained from IBM Lagos quantum computer show that our proposed GNN models, which determine the locations of DD sequences in the quantum circuits, significantly improve the output state fidelity by a factor of 1.4x on average and up to 2.6x compared to the adaptive DD approach, which searches for the best locations of DD sequences at run-time.

The development of near-term quantum computers, referred to as Noisy Intermediate-Scale Quantum (NISQ) computers, has progressed rapidly in the past few years resulting in several quantum computers which vary in their underlying technology and physical constraints. The performance of these computers also varies from one quantum algorithm to another. To enable efficient selection of the quantum computer that provides the highest output fidelity for a given application, an accurate noise modeling of each quantum hardware is required. However, noise modeling for a given application is a complex problem because of the unknown interaction between the quantum circuit parameters and the noise parameters of NISQ devices. We propose the use of Machine Learning (ML) to model the performance of different quantum computers at the application level. The ML models predict the output fidelity of the quantum application executed on different quantum computers given their publicly available physical constraints. We use a diverse training dataset to cover the key features for application-level benchmarking of the quantum hardware. Our results obtained from different superconducting quantum devices show that our proposed ML models enable cost-effective quantum computer selection for different quantum applications with different fidelity metrics.

While current quantum computers, referred to as Noisy Intermediate-Scale Quantum (NISQ) computers, are expected to be beneficial for different applications, they are prone to different types of errors. In order to enhance the reliability of quantum systems, noise-aware quantum compilers are used to generate physical quantum circuits to be executed on NISQ computers. The quantum hardware is calibrated very frequently and its error rates are computed accordingly. Based on the hardware error rates, a quantum compiler allocates physical qubits and schedules quantum operations. However, error rates may change post-calibration. To incorporate dynamic error rates into quantum circuit compilation with minimum cost, we propose a Machine Learning (ML)-based scheme to detect the incorrect output of the quantum circuit and predict the Probability of Successful Trials (PST) with high accuracy. Our approach can verify the error rates of the quantum hardware and validate the correctness of the extracted quantum circuit output. We provide a case study of our ML-based reliability models using IBM Q16 Melbourne quantum computer. Our results show that the proposed scheme achieves a very high prediction accuracy.