The hardware-accelerated real-time compression of 8K Ultra-High-Definition (UHD) video is an exemplary application that empowered by the latest video coding standard. However, the coding tools added to the recently released third-generation audio video coding standard (AVS3) greatly increase the coding complexity, which seriously hinders the efficient implementation of hardware encoder. In order to break the known bottleneck, this paper presents the first open source software library for 8K UHD video coding hardware implementation, namely OpenHardwareVC. Specifically, based on the analysis of the original AVS3 software algorithm, we provide the hardware acceleration designs of the four major coding stages, including coding unit (CU) partition, intra prediction, transform and entropy coding, in this library. Simulation results on Xilinx VU440 FPGA show that the real-time compression of 8K UHD videos at 30 frames per second (fps) can be easily supported based on software-described modules packaged in this library. The release of this library is quite favorable for the hardware design and system implementation of UHD video coding, which is also beneficial to the promotion of the new coding standard. The open source library for OpenHardwareVC is available at https://git.openi.org.cn/OpenHardwareVC.

The complexity of hardware implementation of the third generation audio video coding standard (AVS3) has been significantly improved due to more flexible intra prediction methods. In this paper, an efficient intra mode decision algorithm for parallel hardware architecture of the AVS3 intra encoder is presented. The key idea is to process coding units (CUs) in parallel, including intra prediction and estimating RateDistortion (RD) cost for mode decision. Specially, regression treebased fast algorithm is adopted to decide several preselected modes, together with sufficient consideration into the tradeoff between RD-cost and complexity of prediction engines. In order to obtain the optimal intra mode and improve throughput, prediction module and Hadamard-cost module are devised to process all the candidate modes in parallel. To the best of our knowledge, this is the first parallel hardware architecture of AVS3 intra prediction. Compared with the HPM-6.0 reference software, the proposed algorithm leads to a reduction of 78% in computation workload, while the average BD-PSNR is -0.40 dB for the common test videos. When implemented on the Vertex UltraScale VU440 targeting at 300MHz, the proposed design can support the real-time encoding of 4K videos at 30fps.

The third generation Audio Video Coding Standard (AVS3) has been developed that improves coding performance significantly. However, the optimization research on rate control for AVS3 is not fully exploited. This paper presents a rate control method that is efficient for intra frame coding in AVS3. Specifically, at the frame-level, a Rate-SATD-QP (RSQ) model is derived based on the sum of absolute transformed difference (SATD) to calculate the quantization parameter (QP). Furthermore, at the coding tree uint (CTU) level, a feedback mechanism is developed to adjust QP for more fine-grained rate control. Experimental results demonstrate that, compared with the Fixed-QP algorithm in the AVS3 reference software (HPM 7.0), our scheme achieves 0.13% bitrate error on average with a 0.08% BD-rate gain in the Y component, meanwhile producing 2.19% and 2.53% BD-rate gains in the U and V components, respectively.