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Myoung-Jin Kim

dblp:30/10137 · DBLP profile ↗
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3ranked-venue papers
0as first author
0since 2021 · last 2012
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2Graphics, computer vision, multimedia, augmented reality and games · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Energy-efficient computing · 30% Performance modeling and evaluation · 23% Embedded and real-time systems · 23%

Topics — the 4 heaviest of 5, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Energy-efficient computing › power management
dynamic voltage and frequency scaling
0.112012
Application-Support Particle Filter for Dynamic Voltage Scaling of Multimedia Applications · IEEE Trans. Computers 2012
Performance modeling and evaluation › performance prediction
execution time prediction
0.112012
Application-Support Particle Filter for Dynamic Voltage Scaling of Multimedia Applications · IEEE Trans. Computers 2012
Embedded and real-time systems › soft real-time systems
real-time multimedia
0.112012
Application-Support Particle Filter for Dynamic Voltage Scaling of Multimedia Applications · IEEE Trans. Computers 2012
Hardware accelerators and domain-specific architectures
video decoder
0.112012
Application-Support Particle Filter for Dynamic Voltage Scaling of Multimedia Applications · IEEE Trans. Computers 2012

Methods — techniques the papers use, named apart from their topics

particle filter · 0.1adaptive filter · 0.1
YearPublicationVenuePosition
2012 Asymmetric DRAM synthesis for heterogeneous chip multiprocessors in 3D-stacked architecture
abstract
Various computational requirements of real-world applications have leveraged moving to heterogeneous chip multiprocessors (CMPs) from homogeneous ones. In the meantime, three-dimensional integration of DRAMs and processors using Through Silicon Vias (TSVs) has emerged as the most viable solution for breaking the memory wall in CMP environment by bringing much higher memory bandwidth compared to current PCB level processor-DRAM integration. However, most researches on 3D-stacked DRAM have focused on increasing the memory bandwidth to improve the overall throughput of a system, even though the memory access requirements of real-world applications are various just as the computational requirements. To tackle this problem, we propose an asymmetric 3D-stacked DRAM architecture where the DRAM die is divided into multiple segments and the segments are optimized for different memory requirements. Also, since the optimal architecture of the DRAM can be different for different heterogeneous CMPs, we propose an automatic synthesis method for the asymmetric 3D-stacked DRAM architecture. The experimental results show that the area-power-product is reduced by 65.1% on average compared to the conventional architectures for the four realistic benchmarks and many of their derivatives.
Minje Jun, Myoung-Jin Kim, Eui-Young Chung
ICCAD2
2012 Application-Support Particle Filter for Dynamic Voltage Scaling of Multimedia Applications
abstract
Dynamic Voltage and Frequency Scaling (DVFS) is an effective low-power technique for real-time workloads. Its effectiveness critically depends on the accurate prediction of the task execution time. Many DVFS approaches have been proposed, but they are insufficient for highly nonstationary workloads. Several recent DVFS techniques adopted adaptive filters to improve accuracy. However, their improvement was rather limited, since they mainly focused on applying a filter framework to the target application without tuning it. We address this issue by proposing Particle Filter (PF)-based video decoders (MPEG2 and H.264) which exploit application-specific characteristics. More specifically, our PF-based video decoders utilize the size of each frame for the prediction of its decoding time. Compared to previous work, the PF is more suitable for our purpose, since it achieves higher prediction accuracy, even for highly nonstationary workloads such as H.264 clips. Our results show that the energy saved by the proposed approach is comparable to that of the ideal policy called oracle-DVFS, while the existing methods we tested were far inferior to oracle-DVFS in terms of H.264 video decoding. Additionally, when our method was used, only 0.40 and 6.88 percent of the frames missed their deadlines with negligible computational overhead for MPEG and H.264, respectively.
Jae-Beom Lee, Myoung-Jin Kim, Sungroh Yoon, Eui-Young Chung
IEEE Trans. Computers2
2010 Fast and efficient Gaussian noise image restoration algorithm by spatially adaptive filtering
abstract
In this paper, we propose a spatially adaptive noise removal algorithm using local statistics that consists of two stages: noise detection and removal. To corporate desirable properties into denoising process, the local weighted mean, local weighted activity, and local maximum are defined. With these local statistics, the noise detection function is defined and a modified Gaussian filter is used to suppress the detected noise components. The experimental results demonstrate the effectiveness of the proposed algorithm.
Myoung-Jin Kim, Min-Cheol Hong
PCS2