The computer industry continues to be transformed by much of the technology that it creates for the markets it supplies. Much of this transformation has been fueled by relentless performance improvements in high-performance microprocessors, interconnection, and communications technologies and computing platforms based on them. Legacy systems of only a decade ago have largely been transformed into nodes on interconnected networks of networks. Where value is added in systems, how systems are differentiated from one another, and how systems are marketed and distributed have undergone substantial change. This paper discusses several implications that these changes imply for some of the future generations of microprocessors and microprocessor-based systems.

Microcode compaction is an essential tool for the compilation of high-level language microprograms into microinstructions with parallel microoperations. The purpose of the research reported in this paper is to compare four microcode compaction methods reported in the literature: first-come first-served, critical path, branch and bound, and list scheduling. In order to do this a complete, machine independent method of representing the microoperations of real machines had to be developed; and the compaction algorithms had to be recast to use this representation. The compaction algorithms were then implemented and tested on microcode produced by a compiler for a high-level microprogramming language. The results of these experiments were that for all cases examined the first-come first-served and list scheduling algorithms produced microcode compacted into a minimal number of microinstructions in time that was a polynomial function of order two of the number of input microoperations.

Dataflow languages and processors are currently being extensively studied because of their respective ability to specify and execute programs which exhibit a high degree of parallel and/or asynchronous activity [12, 7]. This paper describes a comprehensive simulation environment that allows for the execution and monitoring of dataflow programs. One overall objective of this facility was to meet the needs of researchers in such diverse areas as computer architecture, algorithm analysis, and language design and implementation. Another objective was to accommodate the semantics of several of the contending abstract dataflow models [2, 4]. Additionally, it was desired to enhance the abstract dataflow models which the simulator would support. These objectives, combined with the desired debugging and metering requirements, directed the design of the overall system. A brief introduction to dataflow and its related terminology is given to assist the reader. A companion paper [6] describes an augmentation to the basic simulation facility presented here that allows for the execution of dataflow programs on processors having finite resources.

Dataflow languages and processors are currently being extensively studied because they provide for the specification and realization of processes exhibiting a high degree of parallel and/or asynchronous activity [12, 8]. Several researchers have developed simulators for specific candidate dataflow architectures in which there are essentially an infinite number of resources available to the nost machine [9, 1]. This is done to study the degree of parallelism which is achievable with a given version of an algorithm. However, it is an equally important (and neglected) area to study the behavior of programs executing in candidate computer systems having a finite amount of resources. This paper presents results which have been obtained from such modeling. It is shown that in such a system certain “critical nodes” must be given priority of execution when competing with other nodes for the same resources in order to achieve the maximum system throughput. It is suggested that the abstract dataflow model be modified to accommodate such situations. Various design trade-offs associated with the implementation of the simulator are discussed along with a description of available features. A companion paper [6] describes the general dataflow simulation facility which provided the basis of this work.

This paper reviews past experiences and discusses future work in the area of interval arithmetic at the University of Southwestern Louisiana(USL). Two versions of interval arithmetic were developed and implemented at USL(*). An interval data type declaration and the necessary mathematical functions for this data type were added to Fortran via the preprocessor Augment(4, 5). In the first version, the endpoints of the intervals were represented as single percision floating point numbers. In the other version, the endpoints were represented to 56 decimal digits. Production engineering programs were run as benchmarks(8). The accumulation ot computational and algorithmic error could be observed as a widening of the intervals. The benchmarks were also run in normal single and double precision arithmetic. In some instances, the result obtained from a single or double precision calculation was not bounded by the corresponding interval result indicating some problem with the algorithm. The widening of an interval does not necessarily indicate a data sensitivity nor error in an algorithm. However, these large intervals can be used as indicator of no problems. As could be expected, the 56-decimal digit precision interval gave better results in terms of smaller intervals due to the increased amount of precision. The obvious problem with this version is that the amount of overhead required for its execution is high.

This paper describes a combined arithmetic unit and language support system which allows user specifications of the arithmetic. Limited extensions to a high-level language, in connection with a generalized underlying arithmetic unit, allow a single skeletal unified numeric operand type to be refined into a variety of data types. The interpretation of operands by the operators is based on type descriptors, allowing one set of polymorphic arithmetic operators to be defined across all combinations of user-defined operand types. The arithmetic unit is realized in microcode to achieve efficiency.

This paper presents results which stem from a research effort concerned with the specification and design of arithmetic units which can execute nonstandard integer and floating-point arithmetic. An arithmetic unit is proposed whose characteristics are based on user specifications and subsequently is termed a Polymorphic Arithmetic Unit (PAU). The user binds the identity of the PAU by specifying the contents of various descriptors and semantic interpretation tables which the PAU accesses during its execution. This capability removes several of the restrictions found in commercially available arithmetic units and potentially assists in mak-ink mathematically software portable.

A companion paper entitled, "A Unified Numeric Data Type in Pascal", proposes the substitution of the standard data type real of the language Pascal with a unified data representation termed numeric. The numeric data type can represent a variety of arithmetic operands such as integers, normalized floating point numbers, and centered-radius intervals. This paper describes an arithmetic unit which is capable of executing the standard arithmetic operations (addition, subtraction, multiplication, and division) on pairs of operands specified to be of the numeric data type. This arithmetic unit, called the UNRAU — Unified Numeric Representation Arithmetic Unit, supports operations on operands externally represented as 5-tuples (t, a, e, f, r). The UNRAU provides for automatic conversion among the various data types and can also be used to perform an explicit conversion on a single operand. It is intended to implement the UNRAU on a dynamically microprogrammable microprocessor to determine what host facilities are required to efficiently realize such an arithmetic unit and to experiment with the high level language support of such a unit.

This bibliography on computer arithmetic uses, by and large, the format and abbreviations employed by Computing Reviews. It is presented in alphabetical order only and not by individual topics. The topics included, however, span the abstract and implementation problems associated with finite precision computer arithmetics.

This short note presents the view that microprogramming affords a technology that can provide a powerful, efficient, and versatile computer facility for numerical analysts. Particular areas of application are discussed. Fundamental questions are raised relevant to the exploitation of this technology by numerical analysts.