The goal of the SLOTH family of operating system kernels is to provide a unified priority space to the real-time applications. By automated mapping of tasks to interrupts, we eliminate rate-monotonic priority inversion and increase execution determinism. In its standard implementation, however, SLOTH has been criticized for being unsafe, since interrupt service routines are executed in supervisor mode. SAFER SLOTH mitigates this shortcoming-while keeping the favorable properties of SLOTH-and provides a safe and isolated execution environment for application tasks. Adopting the SLOTH philosophy of embracing and exploiting hardware particularities, its generative approach automatically tailors the system to both the application and the target architecture. We achieve efficient MPU-based memory protection at reduced latency and low performance overhead by leveraging code inlining and compiler optimizations. In comparison to a commercial AUTOSAR OS, SAFER SLOTH achieves speedups between 8x (worst case) and 23x (best case) on kernel latencies while retaining the SLOTH advantages of strict priority obedience, excellent determinism and small memory footprints.

Traditional time-triggered operating systems are implemented by multiplexing a single hardware timer - the system timer - in software, having the kernel maintain dispatcher tables at run time. Our Sloth on Time approach proposes to make use of multiple timer cells as available on modern micro controller platforms to encapsulate dispatcher tables in the timer configuration, yielding low scheduling and dispatching latencies at run time. Sloth on Time instruments available timer cells in different roles to implement time-triggered task activation, deadline monitoring, and time synchronization, amongst others. By comparing the Sloth on Time kernel implementation to two commercial kernels, we show that our concept significantly reduces the overhead of time-triggered operating systems. The speed-ups in task dispatching that it achieves range up to a factor of 171x, and its dispatch latencies go as low as 14 clock cycles. Additionally, we demonstrate that Sloth on Time minimizes jitter and increases schedulability for its real-time applications, and that it avoids situations of priority inversion where traditional kernels fail by design.

Event latency is considered to be one of the most important properties when selecting an event-driven real-time operating system. This is why in previous work on the Sloth kernel, we suggested treating threads as ISRs -- executing all application code in an interrupt context -- and thereby reducing event latencies by scheduling and dispatching solely in hardware. However, to achieve these benefits, Sloth does not support blocking threads or ISRs, but requires all control flows to have run-to-completion semantics. In this paper, we present Sleepy Sloth, an extension of Sloth that provides a new generalized thread abstraction that overcomes this limitation, while still letting the hardware do all scheduling and dispatching. Sleepy Sloth abolishes the (artificial) distinction between threads and ISRs: Threads can be dispatched as efficiently as interrupt handlers and interrupt handlers can be scheduled as flexibly as threads. Our Sleepy Sloth implementation of the automotive OSEK OS standard provides much more flexibility to application developers while maintaining efficient execution of application control flows. Sleepy Sloth runs on commodity off-the-shelf hardware and outperforms a leading commercial OSEK implementation by a factor of 1.3 to 19.

We introduce the Egs mote platform based on the Cortex M3 microcontroller that focuses on medical sensing applications. Egs uses an Atmel SAM3U microcontroller that runs up to 96 MHz and has up to 52 KB of RAM and 256 KB of Flash. Egs combines this microcontroller with two radios (802.15.4 and Bluetooth), external flash, on board sensors, and a LCD touchscreen to enable a rich set of wireless sensing applications.

A common problem in event-triggered real-time systems is caused by low-priority tasks that are implemented as interrupt handlers interrupting and disturbing high-priority tasks that are implemented as threads. This problem is termed rate-monotonic priority inversion, and current software-based solutions are restricted in terms of more sophisticated scheduler features as demanded for instance by the AUTOSAR embedded-operating-system specification.

Traditional operating systems differentiate between threads, which are managed by the kernel scheduler, and interrupt handlers, which are scheduled by the hardware. This approach is not only asymmetrical in its nature, but also introduces problems relevant to real-time systems because low-priority interrupt handlers can interrupt high-priority threads. We propose to internally design all threads as interrupts, thereby simplifying the managed control-flow abstractions and letting the hardware interrupt subsystem do most of the scheduling work. The resulting design of our very light-weight Sloth system is suitable for the implementation of a wide class of embedded real-time systems, which we describe with the example of the OSEK-OS specification. We show that the design conciseness has a positive impact on the system performance, its memory footprint, and its overall maintainability.

We describe the implementation of memory protection by means of aspect-oriented programming (AOP) in CiAO, an AUTOSAR-like family of embedded operating systems. The use of AOP was originally motivated by the fact that memory protection is a cross-cutting policy, which, furthermore, has to be configurable at build-time in AUTOSAR. We learned, however, that besides switching between full protection and no protection, an AOP-based approach also makes it easy to apply completely different models of protection. For the domain of statically configured embedded systems, where certain failure scenarios can often be excluded by means of code analysis or even probability, this facilitates tailored and light-weight "pay-as-you-use" protection strategies.