Logic synthesis is a crucial step in integrated circuit design, and area optimization is an indispensable part of this process. However, the area optimization problem for large-scale Fixed Polarity Reed-Muller (FPRM) circuits is an NP-hard problem. To address this problem, we divide Boolean circuits into small-scale circuits based on the idea of divide-and-conquer using the proposed grouping decomposition mechanism. Each small-scale Boolean circuit is transformed into an FPRM circuit by a polarity transformation algorithm. To ensure the circuit’s functionality remains unaffected, we integrate FPRM circuits into an FPRM and Boolean (RM-TB) dual logic circuit based on the proposed gate-level integration. However, the area optimization problem of RM-TB dual logic circuits is a multi-task, high-dimensional, and multi-extremal combinatorial optimization problem. Therefore, we propose a Multipopulation Multitasking Optimization Algorithm (MMuOA) that integrates self-evolution with a multitasking equilibrium optimizer and cross-task evolution through knowledge sharing and transfer. This forms a dynamic optimization framework for simultaneously searching for the optimal polarity corresponding to the minimal area of RM-TB dual logic circuits. Moreover, we propose an Area Optimization Approach (AOA) for an RM-TB dual logic circuit with the minimum area using the MMuOA. Experimental results based on the Microelectronics Center of North Carolina (MCNC) Benchmark test circuits demonstrate the effectiveness and superiority of the AOA compared to the state-of-the-art area optimization approach.

Program comprehension is a fundamental activity in the field of software engineering. However, efficiently and accurately understanding source code poses significant chal-lenges, as source code with similar semantics can differ in syntax. Recent state-of-the-art research has demonstrated that combining deep learning techniques with structural information from source code, specifically AST-based static graphs, can en-hance the extraction of essential features from source programs. Control flow and data flow information in source programs can express richer semantics while existing studies often overlook their heterogeneous integration when constructing program static graphs. This oversight results in the loss of information about the type of static graph edges, potentially impeding program comprehension. In this paper, We model the source program by using a heterogeneous static graph and then use Relational Graph Con-volutional Network (R-GCN) for feature extraction. Specifically, we present an innovative method for constructing a program static graph, termed the Heterogeneous Abstract Code Graph (HACG), and then we employ R-GCN to generate representations based on HACG for code classification and code clone detection. We evaluate our method using two extensive source code datasets: CodeNet, introduced by IBM, and BigCloneBench. The experimental results demonstrate the superiority of our approach over existing methods, achieving a code classification accuracy of 97.38 % and an average F1-score of 98.34 % in code clone detection.