EDBT 2026 Demo / reviewers in the wild / expert
Rodrigo Gil-Merino
dblp:301/5675
· DBLP profile ↗
2ranked-venue papers
0as first author
2since 2021 · last 2026
0000-0001-7376-4499ORCID · reported
Domains — the database's venue-derived domains; a paper can count in several
Artificial intelligence and machine learning · 1 · 1 since 2021Systems, architecture and hardware · 1 · 1 since 2021Applied, interdisciplinary, general and emerging computing · 1 · 1 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Emerging computing paradigms · 100% | |
| Theoretical computer science
1 paper |
Computational complexity · 50% Quantum computing and quantum information · 50% |
Topics — the 5 heaviest of 5, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Emerging computing paradigms › quantum computer architecture
quantum circuit optimization |
1.0 | 1 | 2026 | A Framework for Quantum Circuit Optimization: Comparators as a Case Study · IEEE Trans. Computers 2026 |
Emerging computing paradigms
quantum computer architecture |
1.0 | 1 | 2026 | A Framework for Quantum Circuit Optimization: Comparators as a Case Study · IEEE Trans. Computers 2026 |
Emerging computing paradigms
quantum computing |
1.0 | 1 | 2026 | A Framework for Quantum Circuit Optimization: Comparators as a Case Study · IEEE Trans. Computers 2026 |
Computational complexity › algebraic complexity
arithmetic circuit complexity |
0.3 | 1 | 2026 | A Framework for Quantum Circuit Optimization: Comparators as a Case Study · IEEE Trans. Computers 2026 |
Quantum computing and quantum information › quantum circuit optimization
qubit reduction |
0.3 | 1 | 2026 | A Framework for Quantum Circuit Optimization: Comparators as a Case Study · IEEE Trans. Computers 2026 |
Methods — techniques the papers use, named apart from their topics
reversible logic design · 2.0circuit optimization framework · 2.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2026 | A Framework for Quantum Circuit Optimization: Comparators as a Case StudyabstractQubits are the minimum unit of information in quantum computing. As current quantum devices have a very limited number of available qubits, finding circuits that optimize their use is crucial for this computing paradigm. Optimizing the qubits needed to implement a quantum circuit is not trivial, as these circuits have important restrictions such as the impossibility of copying values or the requirement that the computation done in them must always be reversible. This paper presents a framework for optimizing circuits for quantum computing. The framework is able to obtain, given a quantum circuit, an equivalent one that is more efficient in terms of number of qubits. In particular, the framework has applicability in quantum circuits dedicated to arithmetic operations such as addition or multiplication. As a representative case study, it is applied to a reversible comparator circuit, obtaining a design that reduces the number of qubits and controlled gates compared to other reversible comparators reported in the recent literature. As part of the work, a public repository is included with the necessary code to simplify any other circuit. Francisco José Orts Gómez, Rodrigo Gil-Merino |
IEEE Trans. Computers | 2 |
| 2022 | The Asteroid Routing Problem: A Benchmark for Expensive Black-Box Permutation Optimization
Manuel López-Ibáñez 0001, Francisco Chicano, Rodrigo Gil-Merino |
EvoApplications | 3 |