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Rithik Jain

dblp:301/7736 · DBLP profile ↗
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2ranked-venue papers
0as first author
2since 2021 · last 2024
0009-0008-7953-6786ORCID · reported

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 since 2021Security and privacy · 1 · 1 since 2021Software engineering, systems software and programming languages · 1 · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
GPUs and heterogeneous computing · 50% Performance modeling and evaluation · 50%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Performance modeling and evaluation › workload characterization
AI workload characterization
0.812024
A Journey of a 1, 000 Kernels Begins with a Single Step: A Retrospective of Deep Learning on GPUs · ASPLOS (2) 2024
Performance modeling and evaluation
benchmarking
0.812024
A Journey of a 1, 000 Kernels Begins with a Single Step: A Retrospective of Deep Learning on GPUs · ASPLOS (2) 2024
GPUs and heterogeneous computing
deep learning on GPUs
0.812024
A Journey of a 1, 000 Kernels Begins with a Single Step: A Retrospective of Deep Learning on GPUs · ASPLOS (2) 2024
GPUs and heterogeneous computing
GPU computing
0.812024
A Journey of a 1, 000 Kernels Begins with a Single Step: A Retrospective of Deep Learning on GPUs · ASPLOS (2) 2024

Methods — techniques the papers use, named apart from their topics

microarchitecture analysis · 0.8longitudinal study · 0.8
YearPublicationVenuePosition
2024 A Journey of a 1, 000 Kernels Begins with a Single Step: A Retrospective of Deep Learning on GPUs
abstract
We are in age of AI, with rapidly changing algorithms and a somewhat synergistic change in hardware. MLPerf is a recent benchmark suite that serves as a way to compare and evaluate hardware. However it has several drawbacks - it is dominated by CNNs and does a poor job of capturing the diversity of AI use cases, and only represents a sliver of production AI use cases. This paper performs a longitudinal study of state-of-art AI applications spanning vision, physical simulation, vision synthesis, language and speech processing, and tabular data processing, across three generations of hardware to understand how the AI revolution has panned out. We call this collection of applications and execution scaffolding the CaSiO suite. The paper reports on data gathered at the framework level, device API level, and hardware and microarchitecture level. The paper provides insights on the hardware-software revolution with pointers to future trends.
Ian McDougall, Selvaraj Anandaraj, Deep Machchhar, Rithik Jain, Karthikeyan Sankaralingam
ASPLOS (2)5
2022 Lightweight, Multi-Stage, Compiler-Assisted Application Specialization
abstract
Program debloating aims to enhance the performance and reduce the attack surface of bloated applications. Several techniques have been recently proposed to specialize programs. These approaches are either based on unsound strategies or demanding techniques, leading to unsafe results or a high-overhead debloating process. In this paper, we address these limitations by applying partial-evaluation principles to generate specialized applications. Our approach relies on a simple observation that an application typically consists of configuration logic, followed by the main logic of the program. The configuration logic specifies what functionality in the main logic should be executed. LMCAS performs partial interpretation to capture a precise program state of the configuration logic based on the supplied inputs. LMCAS then applies partial-evaluation optimizations to generate a specialized program by propagating the constants in the captured partial state, eliminating unwanted code, and preserving the desired functionalities. Our evaluation of LMCAS-on commonly used benchmarks and real-world applications-shows that it successfully removes unwanted features while preserving the functionality and robustness of the debloated programs, runs faster than prior tools, and reduces the attack surface of specialized programs. LMCAS runs 1500x, 4.6x, and 1.2x faster than the state-of-the-art debloating tools CHISEL, RAZOR, and OCCAM, respectively; achieves 25% reduction in the binary size; demonstrates favorable gadgets elimination trade-off; and eliminates 87.5% of the known CVE vulnerabilities in our test corpus.
Mohannad Alhanahnah, Rithik Jain, Vaibhav Rastogi, Somesh Jha, Thomas W. Reps
EuroS&P2