Over the past years, intelligent control tasks, such as deep neural networks (DNNs), have demonstrated significant potential in control systems. However, deploying intelligent control policies on heterogeneous computing platforms presents open challenges. These challenges extend beyond the apparent conflict between intensive computation and timing constraints and further encompass the interactions between task executions and complicated control performance. To address these challenges, this paper introduces RICH, a general and end-to-end approach to facilitate intelligent control tasks on heterogeneous computing architectures. RICH incorporates both offline Control-Oriented Computation and Resource Mapping (CCRM) and runtime Most Remaining Accelerator Segment Number First Scheduling (MRAF). Given the control tasks, the CCRM starts with balancing the computation workloads and processor resources with the goal of optimizing overall control performance. Subse-quently, the MRAF employs segment-level real-time scheduling to ensure the timely execution of tasks. Extensive experiments on the robotic arms applications (by hardware-in-the-loop simulator) demonstrate that the RICH can work as a general and end-to-end approach. These experiments reveal significant improvements in control performance, with enhancements of 50.7% observed for intelligent control applications deployed on heterogeneous computing platforms.

Despite the advancements in supporting artificial intelligence, accelerator-enabled computing architectures still struggle to meet strict timing constraints due to the complex interactions between CPU cores and accelerators. Although various scheduling and response-time analysis techniques have been developed, a significant gap remains between the conservative hard real-time schedulability (i.e., worst-case response times) and the average measured schedulability on real systems. This pessimism significantly limits the deployment of hard real-time tasks on accelerator-enabled computing platforms. To address this, we propose HARD, a real-time scheduling approach that integrates scheduling strategies, response time analysis, and practical scheduler designs for general accelerator-enabled computing platforms. Benefiting the subtask level segmented characteristics that are ignored by classic schedulers, the proposed HARD can significantly improve the theoretically guaranteed hard real-time schedulability. Extensive experiments on off-the-shelf Intel CPUs and NVIDIA GPUs show that HARD outperforms state-of-the-art scheduling and analysis approaches, delivering a 11.3% improvement in hard real-time schedulability and a remarkable 45.1 % reduction in pessimism.

In recent years, multiple data copies become popular in heterogeneous computing architectures. They enable parallel data transfer among diverse processing units. Tasks executed on such heterogeneous architectures often exhibit heightened re-source competitions and intricate task dependencies, posing challenges in meeting strict timing constraints. Due to the dominant roles of data copies in the heterogeneous architecture, effective scheduling and tight response time analysis could contribute to the timing performance of the entire heterogeneous computing system. In this work, we introduce MATCH, which offers realtime scheduling and end-to-end response time analysis for the multiple parallel data copies that are popular in mainstream heterogeneous architectures. We first identify the aggravated resource competition and task dependency from multiple data copies and comprehensive task execution patterns. Then, we provide a real-time scheduling strategy and cross-granularity schedulability analysis to deal with resource competition and task dependency. Extensive evaluation demonstrates that efficient scheduling and analysis on multiple parallel data copies can significantly improve the schedulability by 55.5%-144.4%. Additionally, experiments conducted on various scales of heterogeneous systems demonstrate that MATCH can significantly reduce pessimism in response time analysis by up to 22.8%-57.5%. Importantly, the proposed approach is compatible with existing scheduling approaches that do not consider multiple parallel data copies and are readily applied to off-the-shelf heterogeneous computing systems.

While accelerator-based heterogeneous architectures have gained traction in accelerating AI tasks, effectively managing them with stringent timing constraints remains a challenge. Although many scheduling and response time analysis approaches are proposed for multi-core or heterogeneous multi-core (i.e., big.LITTLE cores) processors, direct application of them to accelerator-based heterogeneous architectures with multiple CPUs and numerous processing units (PEs) often results in significant pessimism. This paper introduces real-time scheduling and comprehensive response time analysis from unit-level micro view to job-level macro view, for general accelerator-based heterogeneous architectures, greatly enhancing schedulability and utilization rates. We begin by establishing a general task execution pattern on heterogeneous architectures that integrates multiple CPU cores and various PEs. Subsequently, we present a real-time scheduling strategy and corresponding response time analysis based on this task execution pattern from micro to macro views. Through extensive experiments conducted on GEMM and AI workloads, our proposed scheduling and response time analysis significantly outperforms state-of-the-art scheduling algorithms, improving schedulability by 10.3% to 52.9%. Furthermore, experiments on NVIDIA GPU systems indicate a potential pessimism reduction of up to 30.7%. As we target general heterogeneous architectures, our approach can be readily applied to off-the-shelf accelerator-based heterogeneous computing systems, ensuring adherence to deadlines and enhancing schedulability.

Modern control systems, including robotics, drones, and autonomous vehicles, are increasingly incorporating intelligent controllers such as deep neural networks (DNNs) supported by heterogeneous processors. However, unlike conventional control algorithms on homogeneous platforms, the design and runtime execution of intelligent control tasks on heterogeneous computing platforms pose more rigorous demands and substantial challenges. These challenges encompass not only inherent conflicts between algorithm complexity and accuracy but also the couplings and trade-offs among run-time execution latency, end-to-end system performance, and reliability with timing constraints. To address these challenges, this paper introduces an end-to-end capability and scheduling co-design approach to efficiently design intelligent control tasks on heterogeneous computing architectures. We first introduce a novel and general control capability function, which bridges the control performance with the complexity of the intelligent controller, computation latency, and the properties of the physical plants. Subsequently, we formulate a comprehensive optimization problem to properly design algorithm capability and assign limited heterogeneous computational resources from offline heterogeneous resource allocation to run-time execution. Finally, we present a case study on the intelligent control of autonomous quadcopters (with the hardware-in-the-loop simulator built on Microsoft AirSim), and the extensive experiments demonstrate the superiority of the capability and scheduling co-design in terms of overall system performance compared with state-of-the-art design approaches.

It is witnessed that heterogeneous architectures, such as GPUs, TPUs, and FPGAs, have made complex algorithms practical in the last decade. Despite multiple efforts to study the scheduling of these parallel and complex tasks on heterogeneous architectures, the power and energy consumption of the platforms have yet to be well managed under real-time task deadlines. To establish high schedulability in heterogeneous architectures, many scheduling strategies and models, such as multi-segment selfsuspension (MSSS), have been proposed by pioneer researchers. However, directly applying this model to heterogeneous architectures with multiple CPUs and many processing elements (PEs) suffers aggravated power consumption due to the pessimism in the scheduling algorithm and the tolerance margin in the worst-case execution time (WCET) model. Therefore, this paper presents an energy-efficient real-time scheduling approach called EESchedule, which works on heterogeneous architectures with guaranteed schedulability and improved power efficiency. In EESchedule, we build a general task execution model for the general heterogeneous architectures integrating multiple CPUs and many PEs. Then, an energy-efficient real-time scheduling strategy is introduced. Next, the response time and corresponding schedulability analysis are presented for EESchedule. Finally, extensive experiments on heterogeneous NVIDIA Jetson TX2 embedded systems and GPU servers with the Intel i9-10900x CPU and RTX 3080 GPU demonstrate that the EESchedule could achieve the same schedulability with 16.8%-40.7% and 39.0%-48.2% reduced power and energy consumption in comparison with state-of-the-art scheduling algorithms.

Despite being employed in burgeoning efforts to accelerate artificial intelligence, heterogeneous architectures have yet to be well managed with strict timing constraints. As a classic task model, multi-segment self-suspension (MSSS) has been proposed for general I/O-intensive systems and computation offloading. However, directly applying this model to heterogeneous architectures with multiple CPUs and many processing units (PEs) suffers tremendous pessimism. In this paper, we present a real-time scheduling approach, SHAPE, for general heterogeneous architectures with significant schedulability and improved utilization rate. We start with building the general task execution pattern on a heterogeneous architecture integrating multiple CPU cores and many PEs such as GPU streaming multiprocessors and FPGA IP cores. A real-time scheduling strategy and corresponding schedulability analysis are presented following the task execution pattern. Compared with state-of-the-art scheduling algorithms through comprehensive experiments on unified and versatile tasks, SHAPE improves the schedulability by 11.1% - 100%. Moreover, experiments performed on the NVIDIA GPU systems further indicate up to 70.9% of pessimism reduction can be achieved by the proposed scheduling. Since we target general heterogeneous architectures, SHAPE can be directly applied to off-the-shelf heterogeneous computing systems with guaranteed deadlines and improved schedulability.