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Shuya Kotsugi

dblp:305/9474 · DBLP profile ↗
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1ranked-venue papers
0as first author
1since 2021 · last 2021
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Network and information security
1 paper
Hardware security and side channels · 100%
Computer architecture, parallel and distributed computing, and storage systems
1 paper
Integrated circuit design · 100%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Hardware security and side channels › side-channel attack
electromagnetic side channel
0.512021
Tamper-Resistant Optical Logic Circuits Based on Integrated Nanophotonics · DAC 2021
Hardware security and side channels
side-channel attack
0.512021
Tamper-Resistant Optical Logic Circuits Based on Integrated Nanophotonics · DAC 2021
Integrated circuit design › photonic integrated circuits
photonic integrated circuit design
0.512021
Tamper-Resistant Optical Logic Circuits Based on Integrated Nanophotonics · DAC 2021
Hardware security and side channels
tamper-resistant hardware
0.112021
Tamper-Resistant Optical Logic Circuits Based on Integrated Nanophotonics · DAC 2021

Methods — techniques the papers use, named apart from their topics

phase modulation · 1.0electronically-controlled phase shifter · 1.0
YearPublicationVenuePosition
2021 Tamper-Resistant Optical Logic Circuits Based on Integrated Nanophotonics
abstract
A tamper-resistant logical operation method based on integrated nanophotonics is proposed focusing on electromagnetic side-channel attacks. In the proposed method, only the phase of each optical signal is modulated depending on its logical state, which keeps the power of optical signals in optical logic circuits constant. This provides logic-gate-level tamper resistance which is difficult to achieve with CMOS circuits. An optical implementation method based on electronically-controlled phase shifters is then proposed. The electrical part of proposed circuits achieves 300 times less instantaneous current change, which is proportional to intensity of the leaked electromagnetic wave, than a CMOS logic gate.
Jun Shiomi, Shuya Kotsugi, Boyu Dong, Hidetoshi Onodera, Akihiko Shinya, Masaya Notomi
DAC2