EDBT 2026 Demo / reviewers in the wild / expert
Jaekyung Im
dblp:307/9932
· DBLP profile ↗
5ranked-venue papers
4as first author
5since 2021 · last 2026
0000-0002-1781-1606ORCID · corroborated
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 5 · 4 first-author · 5 since 2021Software engineering, systems software and programming languages · 1 · 1 first-author · 1 since 2021
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2026 | TANGRAM: A Novel ILP-based On-Track Bus Routing via Placement and Compression of PolygonsabstractBus routing is an advanced topic of signal routing. Unlikely to the classical routing, the bus routing problem has complex constraints such as topology consistency and channel compactness. Existing bus routing algorithms mostly rely on the iterative maze routing, which is heavily time-consuming and sensitive to net ordering, thereby easily succumbing to suboptimality. To overcome this limitation, we propose a novel bus routing algorithm using placement and compression of routing pattern polygons. Critically, our method does not rely on maze routing, thus highly fast and effective. Experimental results show that the proposed method achieves an average of 1.8% quality improvement over the best known results of ICCAD 2018 contest benchmarks. Jaekyung Im, Seokhyeong Kang |
DATE | 1 |
| 2025 | Leveraging Machine Learning Techniques for Traditional EDA Workflow EnhancementabstractAs technology nodes advance and feature sizes shrink, the increasing complexity of design rules and routing congestion has resulted in greater design challenges and rising costs. Machine learning (ML) models offer significant potential to enhance design quality by enabling early prediction and optimization during the design flow. However, only a few works have validated the effectiveness of ML model when integrated to the traditional design flow. This paper will cover the effectiveness of ML-enhanced design workflow with some practical applications. Additionally, we will address which problems should be solved to achieve successful ML integration. Jinoh Cho, Jaekyung Im, Kyungjun Min, Seonghyeon Park, Jaemin Seo, Jongho Yoon 0001, Seokhyeong Kang |
ASP-DAC | 2 |
| 2025 | A Parallel Analytical Legalization Algorithm via Alternating Direction Method of MultipliersabstractLegalization tries to resolve the cell overlaps and align every cells to the placement sites while honoring the global placement results. The existing legalization works are mostly relying on heuristical cell-by-cell search within a window and this makes large suboptimality in their algorithm. Only a few works have attempted to solve the legalization problem through analytical method, but they also suffered huge runtime overhead and suboptimality due to the discrete nature of legalization. In this paper, we revisit the classical legalization problem and propose a new parallel analytical legalization method based on alternating direction method of multipliers (ADMM) with heterogeneous CPU-GPU parallelism. Experimental results show that our method significantly improves the solution quality compared to existing open-source legalizers. Jaekyung Im, Seokhyeong Kang |
ICCAD | 1 |
| 2024 | SkyPlace: A New Mixed-size Placement Framework using Modularity-based Clustering and SDP RelaxationabstractElectrostatics-based placement has made a great success and inspired many placement algorithms. However, the recent direction of improvement is missing two important problems for mixed-size placement - 1) how to initialize placement and 2) how to handle large macros in the analytical placement. In this paper, we propose our new mixed-size placer, SkyPlace which is enhanced by novel placement initialization using macro-aware clustering and semidefinite programming. Experimental results show that SkyPlace clearly outperforms the leading-edge placer on academic benchmarks. Jaekyung Im, Seokhyeong Kang |
DAC | 1 |
| 2023 | Graph Partitioning Approach for Fast Quantum Circuit SimulationabstractOwing to the exponential increase in computational complexity, the fast simulation of the large quantum circuit has become very difficult. This is an important challenge for the utilization of quantum computers because it is closely related to the verification of quantum computation by classical machines. The Hybrid Schrödinger-Feynman simulation seems to be a promising solution, but its application is very limited. To solve this drawback, we propose an improved simulation method based on graph partitioning. Experimental results show that our approach significantly reduces the simulation time of the Hybrid Schrödinger-Feynman simulation. Jaekyung Im, Seokhyeong Kang |
ASP-DAC | 1 |