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Abdoul Kane

dblp:308/2843 · also Abdoul Aziz Kane · DBLP profile ↗
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4ranked-venue papers
0as first author
4since 2021 · last 2022
0000-0002-9817-736XORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Computer networks · 2 · 2 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer networks
1 paper
Network measurement and analytics · 100%
Computer architecture, parallel and distributed computing, and storage systems
1 paper
Embedded and real-time systems · 100%

Topics — the 2 heaviest of 2, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Network measurement and analytics
flow monitoring
0.512021
Precise real-time monitoring of time-critical flows · CoNEXT 2021
Embedded and real-time systems › real-time communication › real-time networks
time-sensitive networking
0.112021
Precise real-time monitoring of time-critical flows · CoNEXT 2021

Methods — techniques the papers use, named apart from their topics

real-time monitoring · 1.0
YearPublicationVenuePosition
2022 SmartNIC-based Load Management and Network Health Monitoring for Time Sensitive Applications
abstract
Time sensitive network applications, for example in Intra-Vehicular Networks, aim to give predictable end-to-end latency guarantees. As a consequence, processing resources of involved host systems remain partially unused, because they are reserved for rare worst cases. This circumstance provides the opportunity to reduce dimensioning overheads by managing the load on the nodes flexibly within the network. In our proposed approach, a SmartNIC involving an FPGA-based load balancer achieves dynamic routing of flows whilst preserving end-to-end latency guarantees. A flow-oriented online network measurement component continuously supervises network traffic with regards to compliance to flow specifications and constraints such as bounded one-way delay, absence of packet loss, and jitter. We use the supervisor to enhance forwarding decisions on the data plane. Initial evaluation yields a saving potential of around 30 %. We showcase quick dynamic reconfiguration of the FPGA when triggered by real-time measurement of the one-way delay using realistic automotive network traffic.
Kilian Holzinger, Franz Biersack, Henning Stubbe, Angela Gonzalez Mariño, Abdoul Kane, Francesc Fons, Haigang Zhang, Thomas Wild, Andreas Herkersdorf, Georg Carle
NOMS5
2021 Enhancements for Hardware-based IEEE802.1CB embedded in Automotive Gateway System-on-Chip
abstract
In this work, authors present a Hardware based strategy for IEEE802.1CB Network Reliability embedded in Automotive Gateways (GW). It is a new approach for HW efficient and cost-effective integration of Frame Replication and Elimination for Reliability (FRER) algorithm within automotive Network-on-Chip / System-on-Chip. In essence, it is a HW architecture that permits to manage the complex integration of IEEE802.1CB within In-Vehicle Networks. The FRER algorithm is split into smaller functionalities which are allocated across the different processing stages of the GW, maximizing device and network performance. The proposed architecture has a strong focus on Functional Safety, introducing important enhancements to overcome IEEE802.1CB limitations identified in the state of the art: data content verification, meaningful network diagnosability and performance verification. It moves a step forward towards fail operational systems and the compliance with ISO 26262, contributing to future autonomous driving networking solutions.
Angela Gonzalez Mariño, Abdoul Kane, Francesc Fons, Juan-Manuel Moreno Aróstegui
ANCS2
2021 EnGINE: Developing a Flexible Research Infrastructure for Reliable and Scalable Intra-Vehicular TSN Networks
abstract
Driver assistance, self-driving, and multimedia systems have two common implications: increasing demand on network bandwidth and the need for more powerful computation nodes. As a result, intra-vehicular networks (IVNs) change their layout. They are built around central nodes connected to the rest of the vehicle via Ethernet. The usage of Ethernet presents a challenge, as it lacks support for deterministic behavior by design. The solution is found within the IEEE Time-Sensitive Networking (TSN) standards, introducing real-time, low-latency, and deterministic communication into the Ethernet ecosystem. These new networked systems need to be thoroughly evaluated with IVN requirements in mind. To assess numerous configurations of IVN setups, in this work, we introduce a novel Environment for Generic In-vehicular Networking Experiments — EnGINE. It allows, among many others, repeatable, reproducible, and replicable TSN experiments with high precision and flexibility, which is not possible to run using proprietary solutions. EnGINE is based exclusively on commercial off-the-shelf components and is orchestrated by a flexible Ansible framework. This approach allows us to configure various topologies emulating realistic IVNs behavior, which is challenging using simulations. Based on available related work, we further address the challenges found in the IVNs. We derive additional requirements for experiments in the TSN domain and present our approach to fulfill them in an experimental setting. We believe that EnGINE provides the ideal environment for TSN network experiments.
Filip Rezabek, Marcin Bosk, Thomas Paul, Kilian Holzinger, Sebastian Gallenmüller, Angela Gonzalez Mariño, Abdoul Kane, Francesc Fons, Haigang Zhang, Georg Carle, Jörg Ott
CNSM7
2021 Precise real-time monitoring of time-critical flows
abstract
Ethernet is increasingly used in areas where time-critical and safety-relevant data are transported over the network along with best-effort flows, for example in intra vehicle networks or industrial networks. The resulting complex network architectures, time-sensitive networking configurations and system interactions are hard to foresee during the design phase. Therefore, it is hard to rule out any violations of flow specifications or timing and reliability requirements, especially in the presence of unpredictable failures.
Kilian Holzinger, Henning Stubbe, Franz Biersack, Angela Gonzalez Mariño, Abdoul Kane, Francesc Fons, Haigang Zhang, Thomas Wild, Andreas Herkersdorf, Georg Carle
CoNEXT5