Investigating auditory perception and cognition in realistic, controlled environments is made possible by virtual reality (VR). However, when visual information is presented, sound localization results from multimodal integration. Additionally, using head-mounted displays leads to a distortion of visual egocentric distances. With two different paradigms, we investigated the extent to which different visual scenes influence auditory distance perception, and secondary presence and realism. To be more precise, different room models were displayed via HMD while participants had to localize sounds emanating from real loudspeakers. In the first paradigm, we manipulated whether a room was congruent or incongruent to the physical room. In a second paradigm, we manipulated room visibility - displaying either an audiovisual congruent room or a scene containing almost no spatial information- and localization task. Participants indicated distances either by placing a virtual loudspeaker, walking, or verbal report. While audiovisual room incongruence had a detrimental effect on distance perception, no main effect of room visibility was found but an interaction with the task. Overestimation of distances was higher using the placement task in the non-spatial scene. The results suggest an effect of visual scene on auditory perception in VR implying a need for consideration e.g. in virtual acoustics research.

Virtual reality (VR) has become a popular approach to study human behavior in fire.The present position paper analyses Strengths, Weaknesses, Opportunities, and Threats (SWOT) of VR as a research tool for human behavior in fire.Virtual environments provide a maximum of experimental control, are easy to replicate, have relatively high ecological validity, and allow safe study of occupant behavior in scenarios that otherwise would be too dangerous.Lower ecological validity compared to field studies, ergonomic aspects, and technical limitations are the main weaknesses of the method.Increasingly realistic simulations and other technological advances provide new opportunities for this relatively young method.In this position paper, we argue that VR is a promising complementary laboratory tool in the quest to understand human behavior in fire and to improve fire safety.

The complexity of embedded systems is continuously growing due to the increasing requirements on performance. In portable systems such as smart cards, not only performance is an important attribute, but also the power and energy consumed by a given application. Sources of energy used in smart card systems like batteries and electromagnetic fields are not such ideal elements, as their effectiveness depends heavily on the energy consumed over time. Optimization strategies proposed so far are implemented statically. Often a manual measurement of the current profile followed by manual optimizations is carried out. This procedure is very time consuming. We present a method for reducing automatically the power of an application based on a compiler optimization.

Smart cards are embedded systems which are used in an increasing number of secure applications. As they store and deal with confidential and secret data many attacks are performed on these cards to reveal this private information. Consequently, the security demands on smart cards are very high. It is mandatory to evaluate the security of the design but this is performed often very late in the design process or when the chip has already been manufactured. This paper presents a hierarchical security attack simulation flow for smart card designs where security attacks can be simulated in the processor specific model at transaction layer 1 in SystemC. Therefore, the power consumption profile is analyzed at this level. Preliminary results show that this analysis at high abstraction level can be used to determine vulnerabilities of the system to security attacks. Moreover, points to insert software countermeasures can easily be identified.

In this paper an environment for design verification of smart cards using security attack simulation in SystemC is presented. The method for automatic instrumentation of the SystemC code is described, also depicted is the process by which design robustness against attacks is verified. This process involves the system behavior analysis using an extended control flow graph. The results discuss the system behavior analysis of a Java Card/spl trade/ Virtual Machine.

Smart cards are one of the smallest computing platforms in use today. They are used in an increasing number of security applications. To gain sensitive data, a lot of security attacks are performed on smart cards. Therefore it is mandatory to test smart cards for robustness in matters of security. Tests are very time consuming and are performed often very late in the design process. This paper presents a methodology for high-level fault injection for security attack simulation in smart cards. The fault injection technique into SystemC designs is described and the fault injection tool is presented. Moreover, the system behaviour analysis is depicted. Preliminary results show that this methodology can assist in finding system components vulnerable to security attacks.

Smart cards are one of the smallest computing platforms in use today. Due to their limited resources applications are often simple and less complex. High performance 32-bit smart cards, which were introduced by several vendors in the last years, allow the implementation of complex applications on smart cards. Additional to the high performance processor cores these smart cards contain coprocessors to reach the performance and power consumption goals. The interface between the processor and the coprocessor influences the performance and power consumption and should be evaluated early in the design process. We propose a hierarchical bus model for system-level smart card design which supports accurate energy dissipation estimation. The bus models have been implemented in systemC 2.0 at transaction level layer one (cycle accurate) and layer two (timing estimation). We evaluate accuracy and simulation performance of the models and show their usage as bus functional models for a smart card application.