Demo Data from EDBT 2026 / reviewers in the wild / expert
Douglas D. Dunlop
dblp:31/5137
· DBLP profile ↗
5ranked-venue papers
2as first author
0since 2021 · last 2010
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Software engineering, systems software and programming languages · 3 · 2 first-authorSystems, architecture and hardware · 1Databases, data management, data science and information retrieval · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Electronic design automation · 77% Processor architecture and microarchitecture · 23% | |
| Software engineering, system software, and programming languages
3 papers |
Program verification · 64% Runtime systems and virtual machines · 36% |
Topics — the 5 heaviest of 6, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Electronic design automation
hardware/software co-design |
0.0 | 1 | 1997 | Generation of Software Tools from Processor Descriptions for Hardware/Software Codesign · DAC 1997 |
Runtime systems and virtual machines › virtual machine implementation
instruction set simulation |
0.0 | 1 | 1997 | Generation of Software Tools from Processor Descriptions for Hardware/Software Codesign · DAC 1997 |
Processor architecture and microarchitecture › special-purpose processor
digital signal processor |
0.0 | 1 | 1997 | Generation of Software Tools from Processor Descriptions for Hardware/Software Codesign · DAC 1997 |
Program verification › invariant verification › invariant-based verification
loop invariants |
0.0 | 1 | 1985 | Generalizing Specifications for Uniformly Implemented Loops · ACM Trans. Program. Lang. Syst. 1985 |
Automated reasoning and model checking
program verification |
0.0 | 1 | 1984 | A Heuristic for Deriving Loop Functions · IEEE Trans. Software Eng. 1984 |
Methods — techniques the papers use, named apart from their topics
nML processor description language · 0.0heuristic · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2010 | The Case for Implementing Core Descriptive Embedded Metadata at the Smithsonian
Stephanie Ogeneski Christensen, Douglas D. Dunlop |
Dublin Core Conference | 2 |
| 1997 | Generation of Software Tools from Processor Descriptions for Hardware/Software CodesignabstractAn experimental set of tools that generate instruction set simulators,assemblers, and disassemblers from a single description wasdeveloped to test if retargetable development tools would work forcommercial DSP processors and microprocessors. The processorinstruction set was described using a language called nML. TheTMS320C50 DSP processor and the ARM7 microprocessor weremodeled in nML. The resulting instruction set models executeabout 25,000 instructions per second, and compiled instruction setsimulation models execute about 150,000 instructions per second.The viability of this approach and the deficiencies of nML are discussed. Mark R. Hartoog, James A. Rowson, Prakash D. Reddy, Soumya Desai, Douglas D. Dunlop, Ed Harcourt, Neeti Khullar |
DAC | 5 |
| 1985 | Generalizing Specifications for Uniformly Implemented LoopsabstractThe problem of generalizing functional specifications for while loops is considered. This problem occurs frequently when trying to verify that an initialized loop satisfies some functional specification, i.e., produces outputs which are some function of the program inputs. The notion of a valid generalization of a loop specification is defined. A particularly simple valid generalization, a base generalization, is discussed. A property of many commonly occurring while loops, that of being uniformly implemented, is defined. A technique is presented which exploits this property in order to systematically achieve a valid generalization of the loop specification. Two classes of uniformly implemented loops that are particularly susceptible to this form of analysis are defined and discussed. The use of the proposed technique is illustrated with a number of applications. Finally, an implication of the concept of uniform loop implementation for the validation of the obtained generalization is explained. Douglas D. Dunlop, Victor R. Basili |
ACM Trans. Program. Lang. Syst. | 1 |
| 1984 | A Heuristic for Deriving Loop FunctionsabstractThe problem of analyzing an initialized loop and verifying that the program computes some particular function of its inputs is addressed. A heuristic technique for solving these problems is proposed that appears to work well in many commonly occurring cases. The use of the technique is illustrated with a number of applications. An attribute of initialized loops is identified that corresponds to the ``effort'' required to apply this method in a deterministic (i.e., guaranteed to succeed) manner. It is explained that in any case, the success of the proposed heuristic relies on the loop exhibiting a ``reasonable'' form of behavior. Douglas D. Dunlop, Victor R. Basili |
IEEE Trans. Software Eng. | 1 |
| 1983 | On the Design of a Special-purpose Scientific Programming LanguageabstractAbstract Observations on the design of the special‐purpose scientific programming language SL/1 are presented. SL/1 is intended for applications programming of the Control Data Corporation Cyber 203, a very high‐performance vector processor, which is mainly used for scientific computation. The language design has been heavily influenced by the hardware characteristics of this machine and the needs of the Cyber 203 user community. Various aspects of the design of SL/1 are discussed and measurements of their use are presented. In addition, unexpected similarities between the resulting design of SL/1 and the design of FORTRAN are examined and several reasons for the continued widespread use of FORTRAN are suggested. John C. Knight, Douglas D. Dunlop |
Softw. Pract. Exp. | 2 |