In current cryogenic temperature sensor (cryo-TS) systems, the sensing front-end and readout circuits typically operate in cryogenic and room-temperature environments, respectively. This paper proposes a scheme to integrate both the front-end devices and readout circuits of cryo-TS within the cryogenic environment to achieve lower noise, digital fan-out of temperature information, and cost reduction. We employed the silicon-germanium (SiGe) heterojunction bipolar transistors (HBT), which demonstrated excellent linearity and current gain even at cryogenic temperatures, as the sensing front end of the cryo-TS and a Zoom-ADC as its readout circuits. A redundancy bit is introduced in the cryogenic readout ADC to avoid temperature misjudgment. The design methodology and key considerations for implementing cryogenic readout analog circuits are presented. Implemented in a 65 nm CMOS process, the cryo-TS achieved a 1-point-trimmed (at 40 K) inaccuracy of ±0.54 K ($\boldsymbol {3\sigma }$) from 4 K to 70 K under a supply current of 22.13$\mu A$.

A 12V-input and 1-1.8V-output hybrid buck converter with a charge converging phase is presented in this summary. The charge converging phase reduces the inductor current to always less than half of load current, which reduces DCR conduction loss and mitigates the reliance on a bulky inductor. Fabricated in a 0.18μm BCD process with a die area of 5mm2, this design utilizes only 5V and 1.8V NMOS as power switches and achieves a peak efficiency of 94.7% and a current density of 685A/cm3.

This paper presents a hybrid buck converter with inductor at low-charge stage designed to convert 48V to 3V-5V for powering AI servers. This converter is based on a Fibonacci switched-capacitor topology with an optimized wiring method for fully utilizing flying capacitors to realize a large voltage conversion ratio. Moreover, with an inductor placed at the low-charge stage, inductor current is further reduced, and hence inductor DCR loss is significantly reduced for enhanced efficiency, and the reliance on a bulky inductor is mitigated for better power density. A hardware prototype was implemented with discrete MOSFETs and drivers to validate the proposed converter, providing a maximum output current of 30A. Measurement results show that the converter achieves a peak efficiency of 93.4% and a power density of up to 723W/in3.

In recent years, analog circuits have received extensive attention and are widely used in many emerging applications. The high demand for analog circuits necessitates shorter circuit design cycles. To achieve the desired performance and specifications, various geometrical symmetry constraints must be carefully considered during the analog layout process. However, the manual labeling of these constraints by experienced analog engineers is a laborious and time-consuming process. To handle the costly runtime issue, we propose a graph-based learning framework to automatically extract symmetric constraints in analog circuit layout. The proposed framework leverages the connection characteristics of circuits and the devices’ information to learn the general rules of symmetric constraints, which effectively facilitates the extraction of device-level constraints on circuit netlists. The experimental results demonstrate that compared to state-of-the-art symmetric constraint detection approaches, our framework achieves higher accuracy and F$_1$-score.

Many previous studies of soft exosuits improved human locomotion performance. However, there is no example to control a soft exosuit using human ankle impedance adaption in assistance tasks compliantly. In this article, the human–environment interaction information is exploited into the exosuit control. A novel fuzzy-based optimization and control method of soft exosuit is proposed to provide plantarflexion assistance for human walking by changing the human–robot interaction. In particular, a fuzzy neurodynamics optimization is developed to learn the unknown human ankle impedance parameters automatically. A fuzzy approximation technique is applied to improve the control performance of the exosuit when a human is walking with unknown human–robot interaction model parameters. This control scheme guarantees that the human–robot dynamics follows a target human ankle impedance model to obtain the compliant interaction performance. Experiments on different participants verify the effectiveness of the control scheme. Results show that a compliant human–robot interaction is achieved by learning the human–environment interaction parameters, i.e., the human ankle parameters. It indicates that our proposed method can facilitate exosuit control to achieve compliant robot–human–environment interaction.

A 6.78 MHz single-stage transmitter (TX) using a reconfigurable regulating class-D power amplifier (PA) for wireless power transfer (WPT) applications is presented. Based on a 3-mode modulation scheme, the TX achieves power regulation and transmission with only one power stage. A discontinuous-conduction-mode (DCM) zero-voltage switching (ZVS) scheme is adopted to reduce switching loss. A control loop is set to regulate the output voltage of the WPT receiver (RX) by automatically adjusting the transmitting power. With dual-loop control and a proportional-integral (PI) compensation scheme, the loop achieves tight regulation and fast response. The controller is implemented digitally to benefit from the AirFuel®embedded Bluetooth communication link. The PA was fabricated with a high-voltage 0.35 μm CMOS process, and the digital controller with a standard 0.35 μm CMOS process, respectively. Measurement results show that the output voltage of the RX was correctly regulated to 11.7 V under a load change of 50mA to 500mA, and the WPT system could deliver a maximum power of 7.3 W to the RX over a distance of 4.0 cm, and achieved TX to RX peak efficiency of 57.3%.

This paper presents a fully-integrated 76-81 GHz four-channel digitally controlled receiver (RX) in 65-nm CMOS, which utilizes a four-channel RX front-end with high linearity, an LO distribution network, and a reconfigurable 4-channel analog baseband (ABB). It achieves high integration level and is capable of flexible reconfigurability automotive radars with wide and flattened temperature characteristic. Each RX front-end consists of a low noise amplifier (LNA) employing a neutralized common source (CS) with configurable high-linearity and an active mixer with linearity-priority design. Additionally, a bias circuit with positive temperature coefficient is used for temperature compensation of the millimeter wave (mm-Wave) amplifiers and mixer. The RX chain offers tunable gain and bandwidth (BW) with digital control and bandwidth tuning for the ABB. The measured results show that the RX achieves an input 1-dB compression point (Pin,1dB) of -7 dBm and a noise figure of 11-26 dB across a temperature range from -45 to +125°C, both over the range of 76-81 GHz. The RX has a tunable gain from 18 to 66 dB over the 3-dB programmable IF BW from 0.1 to 10 MHz. The power consumption of the entire receiver is 0.52 W.

This summary presents a fully-integrated wireless charger to achieve high efficiency with low cost and volume. The charger realizes power rectification, voltage regulation and CCCV charging in one power stage only. A bootstrapping technique is also designed for on-chip integration of the bootstrap capacitors. A chip prototype was fabricated in a standard 0.35μm CMOS process with a die area of 8mm2. The charger achieves peak efficiency of 92.3% and 91.4% when the charging currents are 1A and 1.5A, respectively.

A wireless power receiver using a 3-level reconfigurable resonant regulating (R3) rectifier is presented in this summary. The receiver improves power conversion efficiency and reduces die area and off-chip components by achieving power conversion and voltage regulation in one stage, using only 4 on-chip power switches and 1 off-chip capacitor. The receiver regulates the output voltage at 5 V and delivers a maximum power of 6 W. It was fabricated in a standard 0.35 μm CMOS process with a die area of 4.77 mm2, and the measured peak efficiency reaches 92.2%.

A 13.56 MHz 64.8 mW fully-integrated CMOS active rectifier for biomedical wireless power transfer system is presented in this summary. It employs an adaptive on/off delay compensation technique to accurately compensate for the circuit delays despite PVT variations and mismatches. With an AC input that ranges from 1.8 V to 3.6 V, the measured voltage conversion ratio is higher than 90% and the measured power conversion efficiency is higher than 89.1% for a load resistor of 500 Ω.

A 13.56 MHz wireless power receiver designed with standard CMOS 0.35 μm process used for implantable medical devices (IMDs) is presented. By adopting a one-stage 0X/1X reconfigurable resonant regulating (R3) rectifier, the proposed architecture inherently avoids system voltage conversion ratio (VCR) variation and power conversion efficiency (PCE) degradation problems and thus widens the operation region dramatically. Effects due to the parameters of the coil on the overall system performance are studied and a 50 nH inductor is used in the secondary side to achieve fully on-chip implementation. Based on a synchronized PWM control scheme, the proposed rectifier achieves voltage regulation with only 4 power transistors and 2 gate-driving buffers, which enables compact design and efficient rectification. Meanwhile, the output capacitor can be reduced to 200 nF, while the output voltage is regulated at 3.6 V with less than 100 mV ripple. Simulation results show that the maximum output power is 103.5 mW with efficiency of 91.7%.

This paper presents a circuit-oriented geometrical approach in predicting subharmonic oscillation of DC-DC converters with voltage-mode control. It is based on straightforward graphical analysis of the operation of the converter without using sophisticated mathematical tools. The critical condition of subharmonic oscillation of the buck converter is derived, which is shown to be related to the slope of the output of the compensator Veaat the trip point rather than the amplitude of the ripple voltage of Vea. The proposed analysis is verified for converters with a proportional or a Type-III compensator.

This paper proposes a High-Side (HS) NMOS power switch and bootstrap driver with DCM charging phase extension for high-frequency fully-integrated converters with 1.2V supply voltage. The conventional bootstrap diode is replaced by a self-synchronized switch and the efficiency loss and operation failure at DCM is prevented by an extra charging phase. Simulation at 100MHz with UMC 0.13μm process shows that the optimum efficiency is driven 2% higher with significant power loss reduction by the proposed design compared to a conventional converter under similar operation conditions. 20% power stage area is saved by the dual NMOS structure compared to the conventional converter with PMOS and NMOS switches.