Memristors have emerged as promising candidates for multilevel data storage, in-memory processing, and neural networks since their intrinsic programmability of resistance states under applied stimuli has been well revealed in memristor modeling. However, the programming uncertainty arising from the inherently stochastic nature of the device itself has been overlooked in previous modeling approaches. This omission hinders the incorporation of memristor stochasticity into time-domain circuit simulation. To address this issue, we propose a behavior model that incorporates real-time programming stochasticity. Our model stands out for several attributes: 1) programming stochasticity is included and exhibited in its resistance change over time; 2) its stochastic behavior is depicted by the summation of its deterministic behaviors and a noise signal; and 3) both deterministic behaviors and noise amplitudes depending on the pulse amplitude v and the memristor resistance R are determined by sufficient characterization data of our in-house TiO2 devices in a data-driven method. Consequently, our model is validated as highly matched to the characterized memristor device in terms of time-domain resistance evolution. Additionally, the modeling process can be adapted to different memristors with significant device variations. Furthermore, the model is transformed into the standard Verilog-A style for in-circuit simulation. To demonstrate its compatibility with system-level circuit simulation, a mixed-signal CMOS circuit is designed. This circuit explores the feasibility of storing multibit data within a single memristor, while considering its stochasticity.

In this paper we present a novel memristive circuit that is capable of generating tunable stochastic distributions. The proposed circuit leverages the inherent read noise of the memristor and utilises feedback to shape its spectrum into achieving control over the output distributions mean and standard deviation. We analyse the relationship between various loop parameters and the output noise characteristics of the circuit. We experimentally build the circuit and investigate the output distributions for a range of circuit parameters. Lastly, we develop the theory, propose a system and demonstrate an example, where such circuits generate tunable distributions in hardware for Bayesian Inference and Monte-Carlo sampling.

Emerging resistive technologies include several nonlinear devices with the capability of changing their resistive state based on the voltage (/current) across (/flowing through) the device. The state of these devices is typically read by applying a small DC voltage across the DUT and measuring the current flowing through it (or vice-versa). However, given their non-linear behaviour, a change in voltage across the device, albeit small, will result in a change in the measured resistance. This is undesirable when characterising these devices, as voltage drops due to metal routing or switches in the signal path will affect the measured resistance. This work puts forward the idea of closing the loop by sensing the voltage across the DUT through a Kelvin connection, and then making adjustments to the line voltage to compensate for any voltage drop. This in turn enables larger arrays, and a higher number of states to be read because of the increased precision. An on-chip CMOS design is proposed through the use of a dual-input-pair amplifier. The resulting system is capable of driving a load between 1 kΩ and 10 MΩ with a settling time less than 1 µs for a DUT read voltage of 0.5 V.

In this paper, we study the stochastic state trajectory and conductance distributions of memristors under periodic pulse excitation. Our results, backed by experimental evidence, reveal that practical memristors exhibit a$1/f^{2}$Brownian noise power spectrum. Based on this, we develop a Memristive Distribution Generator (MDG) circuit that produces tunable analog distributions by exploiting the physical stochasticity of memristors. By encoding the prior distributions of Bayesian problems in the physical output samples of these circuits, we demonstrate that Monte-Carlo sampling can be devised without knowledge of the analytical output distribution of the memristor. Using examples of 1-D Bayesian linear regression and a dynamic 2-D nonlinear localisation problem, we show how MDG circuits can act as a tunable source of randomness, efficiently representing distributions of interest. Our results, obtained using Pt/TiO2/Pt memristors, validate the use of memristor-based MDGs for implementing probabilistic algorithms.