Demo Data from EDBT 2026 / reviewers in the wild / expert
Pek Jun Tiw
dblp:314/2105
· DBLP profile ↗
2ranked-venue papers
0as first author
2since 2021 · last 2024
0000-0002-7302-9467ORCID · corroborated
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1 · 1 since 2021Applied, interdisciplinary, general and emerging computing · 1 · 1 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Memory systems · 72% Emerging computing paradigms · 28% |
Topics — the 4 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Memory systems
processing-in-memory |
0.9 | 2 | 2024 | MeMCISA: Memristor-Enabled Memory-Centric Instruction-Set Architecture for Database Workloads · MICRO 2024 In-memory computing with emerging nonvolatile memory devices · Sci. China Inf. Sci. 2021 |
Emerging computing paradigms
memristive computing |
0.8 | 1 | 2024 | MeMCISA: Memristor-Enabled Memory-Centric Instruction-Set Architecture for Database Workloads · MICRO 2024 |
Memory systems
in-memory computing |
0.5 | 1 | 2021 | In-memory computing with emerging nonvolatile memory devices · Sci. China Inf. Sci. 2021 |
Memory systems
non-volatile memory |
0.5 | 1 | 2021 | In-memory computing with emerging nonvolatile memory devices · Sci. China Inf. Sci. 2021 |
Methods — techniques the papers use, named apart from their topics
vector instruction set · 0.8out-of-order scheduling · 0.8near-memory computing · 0.8
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2024 | MeMCISA: Memristor-Enabled Memory-Centric Instruction-Set Architecture for Database WorkloadsabstractThe exponential growth of data exerts great pressure on hardware design for database systems. Memory-centric computing (MCC) architecture, which enable compute capabilities near or inside memory storage, demonstrate great potential in enhancing the efficiency of database operations with higher compute parallelism and reduced data movements. However, existing MCC architecture mainly focus on artificial intelligence (AI) computations and those designed for database applications can only run a limited number of standalone queries such as SORT or JOIN, lacking efficient support for increasingly diverse and complex database workloads. For example, realizing a commercial recommendation engine on database requires supporting workloads including but not limited to vector aggregation, convolution or$N$-hop neighborhoods computing, etc. In this work, we develop a memristor-enabled memory-centric instruction-set architecture (MeMCISA) aiming to efficiently accelerate versatile workloads in modern database systems. MeMCISA features scalable multi-bank memristor-based storage organization with near-memory circuitries and caches in banks. An out-of-order (O0O) scheduling scheme is designed for MeMCISA based on a vector instruction set with four types of instructions (bit-level, element-level, vector-level, and control-level), combining memristor-enabled in-memory computing and near-memory computing to efficiently run workloads with varying computational kernels and data sizes. MeMCISA can support parallel instruction executions across different memristor banks as well as different hardware modules within a memristor bank. Furthermore, we develop data dependency handling mechanisms to support vector dependency scenarios in MeMCISA that do not exist in conventional scalar-based instruction sets. A prototype MeMCISA is implemented based on a 40nm CMOS technology with necessary peripheral hardware including instruction buffer and instruction scheduler. To accurately study MeMCISA performance in real-world database systems, a software-hardware co-designed framework integrating reconfigurable MeMCISA prototype is created that can support end-to-end simulations for database workloads starting from raw software codes. Based on this framework, we evaluate MeMCISA performance with standalone database queries as well as complex database workloads from representative benchmarks including UniBench, neural collaborative filtering (NCF), and ResNet-18. Simulation results demonstrate that MeMCISA achieves up to 41.84 × ~ 1767.70 × in speed compared to general-purpose processors (CPUs/GPUs). Yihang Zhu, Lianfeng Yu, Anjunyi Fan, Longhao Yan, Zhaokun Jing, Bonan Yan, Pek Jun Tiw, Yaoyu Tao, Yuchao Yang 0001 |
MICRO | 8 |
| 2021 | In-memory computing with emerging nonvolatile memory devices
Caidie Cheng, Pek Jun Tiw, Yimao Cai, Xiaoqin Yan, Yuchao Yang 0001, Ru Huang 0001 |
Sci. China Inf. Sci. | 2 |