Demo Data from EDBT 2026 / reviewers in the wild / expert
Clement H. J. Wann
dblp:314/5003
· DBLP profile ↗
1ranked-venue papers
0as first author
0since 2021 · last 1999
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Applied, interdisciplinary, general and emerging computing · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Integrated circuit design · 100% |
Topics — the 5 heaviest of 5, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Integrated circuit design › semiconductor devices › device scaling
CMOS scaling limits |
0.0 | 1 | 1999 | Nanoscale CMOS · Proc. IEEE 1999 |
Integrated circuit design › semiconductor device fabrication
CMOS technology |
0.0 | 1 | 1999 | Nanoscale CMOS · Proc. IEEE 1999 |
Integrated circuit design › semiconductor devices
device scaling |
0.0 | 1 | 1999 | Nanoscale CMOS · Proc. IEEE 1999 |
Integrated circuit design › semiconductor devices › MOS technology
nanoscale CMOS |
0.0 | 1 | 1999 | Nanoscale CMOS · Proc. IEEE 1999 |
Integrated circuit design › emerging device technologies
alternative device structures |
0.0 | 1 | 1999 | Nanoscale CMOS · Proc. IEEE 1999 |
Methods — techniques the papers use, named apart from their topics
performance analysis · 0.0device physics modeling · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1999 | Nanoscale CMOSabstractThis paper examines the apparent limits, possible extensions, and applications of CMOS technology in the nanometer regime. Starting from device scaling theory and current industry projections, we analyze the achievable performance and possible limits of CMOS technology from the point of view of device physics, device technology, and power consumption. Various possible extensions to the basic logic and memory devices are reviewed, with emphasis on novel devices that are structurally distinct front conventional bulk CMOS logic and memory devices. Possible applications of nanoscale CMOS are examined, with a view to better defining the likely capabilities of future microelectronic systems. This analysis covers both data processing applications and nondata processing applications such as RF and imaging. Finally, we speculate on the future of CMOS for the coming 15-20 years. H.-S. Philip Wong, David J. Frank, Paul M. Solomon, Clement H. J. Wann, Jefferey J. Welser |
Proc. IEEE | 4 |