This article presents a 56-Gb/s distributed feedback (DFB) laser driver integrated with a PAM-4 clock and data recovery (CDR). A mixed-signal digital-to-analog converter (DAC) is adopted for power-efficient linear driving. With the help of the CDR, high-speed PAM-4 input is digitized into thermometer code, which is processed in NRZ format along the data path before summation at the output node. In this way, higher modulation linearity is realized by independently adjusting the weight of each slice. A dc-coupled differential drive stage is devised to improve signal integrity and energy efficiency at high speed. Employing a fractional-UI delay asymmetric feed-forward equalization (FFE) extends the laser’s bandwidth while the nonlinearity is compensated. The proposed driver is fabricated in 28-nm CMOS and co-packaged with a DFB laser diode. Measurement results show the modulated optical output reaches a 56-Gb/s data rate and consumes 353-mW power, thus corresponding to the energy efficiency of 6.3 pJ/bit, including the integrated CDR.

This paper presents a 32Gb/s non-return-to-zero (NRZ) distributed feedback (DFB) laser diode driver (LDD) fabricated in 65nm CMOS. The driver is directly wire-bonded to the laser diode without AC-coupling capacitors, which simplifies the packaging and ensures high bandwidth (BW). To improve power efficiency, the active back-termination (ABT) structure is employed to absorb signal reflections with lower power. A continuous time linear equalizer (CTLE), a 3-stage current mode logic (CML) buffer and a pre-driver are employed to compensate the channel loss and achieve a bandwidth extension by providing an estimated gain boosting of 7.5dB at high frequency. The clear electrical eye-diagram of the driver is obtained beyond 40Gb/s, while the measured optical transmission data-rate can still exceed 32Gb/s with a rms-jitter of 2ps. According to the experimental results, the bias current and modulation current of the driver are 40mA and 40mApp, respectively, where the power consumption is 390mW.

This paper presents a 50-Gb/s optical receiver (ORX) chipset, consisting of a transimpedance amplifier (TIA) and a clock and data recovery (CDR) circuit in a 45-nm silicon-on-insulator CMOS. The proposed inverter-based TIA employs hybrid shunt-series peaking inductors to extend the bandwidth (BW). A baud-rate CDR is proposed to reduce the sampling phases and clocking power by half. To optimise the ORX for in- package integration, a compact-size digital loop is adopted in each channel, and the clock is recovered by phase interpolation from a shared reference. A complete optical-to-electrical (OE) link is built by integrating the proposed ORX with a high-speed Silicon Photonics (SiP) photodetector (PD). Measurements show that the proposed TIA has a transimpedance gain of 53 dB$\Omega $and a BW of 27 GHz. By integrating it with the SiP PD, the OE front-end (PD+TIA) achieves an input sensitivity of −7.7 dBm at 50 Gb/s and BER$ < 10^{-12}$. It features a power efficiency of 1.61 pJ/bit at a data rate of 64 Gb/s. The complete 50 Gb/s ORX achieves data recovery at a quarter rate of 12.5 Gb/s with an output jitter of 1.6 psrms, and has a 3.125 GHz clock with phase noise of −115.22 dBc/Hz at an offset frequency of 1 MHz.

This paper presents a hybrid-integrated optical transceiver front-end for beyond-400G short-reach optical links. A pair of the monolithic 8-channel laser drivers and the trans-impedance amplifier (TIA) is developed in 180nm SiGe BiCMOS, incorporating arrayed Vertical-Cavity-Surface- Emitting Lasers and photo-detectors. The driver uses a$2^{\mathrm {nd}}$-order continuous-time linear equalizer (CTLE) to compensate for the channel loss with a nonlinear frequency response. Both the inductive peaking and RC-degeneration are embedded at the output stage to extend the optical modulation bandwidth (BW). The series-peaking and multi-stage distributed CTLE are combined in a resistive feedback TIA topology for improved BW and linearity. Measurement results show up to 100-Gb/s PAM-4 electrical eyes of the driver and TIA. The optical transmitter front-end operates 56 Gb/s, 4.1-dB extinction ratio, and 6.6-pJ/bit power efficiency, while the optical receiver front-end achieves 56-Gb/s,$10^{-6}$bit error rate, and 5.9-pJ/bit power efficiency.