Alzheimer’s disease is a neurodegenerative disease characterized by a progressive loss memory and certain intellectual (cognitive) functions leading to repercussions in the activities of daily living. Early diagnosis of Alzheimer’s disease is a difficult task for researchers. In clinical research, magnetic resonance imaging (MRI) is used to diagnose Alzheimer’s disease. MRI can detect cortical atrophy and in particular atrophy of the hippocampi. Approaches based on deep convolutional neural network (CNN) and machine learning represent one solution and they are readily available and described to solve various problems related to the analysis of brain image data. High-dimensional classification approaches have been widely used to study magnetic resonance imaging (MRI) data for automatic classification of Alzheimer’s disease (AD). In this work, we proposed a Deep Siamese Convolutional Neural Network model for a Multi-class Classification of Dementia Stages in Alzheimer’s Disease. The experiments are carried out on the OASIS database accessible free of charge to the public. We compared our model with the best models and found that the proposed model outperforms the best models in terms of different performance.

Summary This article puts forward a fast chaos‐RSA‐based hybrid cryptosystem to secure and authenticate secret images. The SHA‐512 is used to generate a 512‐bit initial key. The RSA system is used to encrypt the initial secret key and signature generation for both the sender and image authentication. In fact, a powerful block‐cipher algorithm is developed to encrypt and decrypt images with a high level of security. At this stage, a strong PRNG based on four chaotic systems is propounded to generate high‐quality keys. Therefore, an improved architecture is suggested. It performs confusion and diffusion of images with low computational complexity. In the final step, the encrypted secret key, signature, and encrypted image are combined together in order to obtain an encrypted signed image. The block‐cipher algorithm is evaluated in‐depth for several ordinary and medical images with different types, content, and size. The obtained simulation results demonstrate that the system enables high‐level security. The entropy has achieved a value of 7.9998 which is the most important feature of randomness. A comparative study against numerous recent encryption algorithms demonstrates that the proposed algorithm provides good results.

Image recognition and classification apps are considered to be one of the most popular apps in recent times due to its extremely important role in daily life. To improve the energy efficiency and performance of compute-demanding CNN, FPGA-based acceleration appears to be the best solution. In this article, we design and implement a hardware / software accelerator to efficiently accelerate the entificient and reusable FPGA-based accelerator that maximizes the FPGA compute capacity by exploiting the reorganization and parallelism of weights is proposed. The accelerator also supports computation of$3\times 3$convolutional layers and MLPs layers without interaction with the CPU. This accelerator is integrated into the tensorflow deep learning framework to provide software programmers with an easy-to-use interface so that they can declare a network definition while taking advantage of an FPGA engine. This system implemented on a Xilinx Zynq SoC using the PYNQ-Z1 platform achieves a frame rate equivalent to 5.91 fps using 16-bit fixed point and an energy efficiency of 186.25x the Intel® Xeon® processre CNN on FPGAs. First, we use tiling techniques to partition the input data. Second, we integrate the proposed accelerator into the tensorflow deep learning framework. We are evaluating the proposed hardware/software system and its integration with tensorflow by implementing the Deep Network In Network. The proposed accelerator achieves peak performance of 57.6 GOPS on a Xilinx PYNQ-Z1 FPGA board. End-to-end evaluation shows performance and power savings of up to 105.91x compared to an Intel® Xeon® CPU E5-2620 V4 under the working frequency of 200 MHz and a frame rate equivalent to 3.42 fps using 16-bit fixed point. Using the system with a high-end FPGA shows even higher gains and performance.

In telemedicine applications, sensitive and private patients' information is collected and transmitted via a telecommunication system. To assure the security services of the exchanged medical images, improved cryptographic algorithms should be designed to protect private information against attacks. In this paper, we propose an efficient cryptosystem for medical image encryption and authentication. The cryptosystem is an Improved Advanced Encryption Standard (IAES) - Elliptic Curve Digital Signature Algorithm (ECDSA) hybrid scheme that uses symmetric and asymmetric approaches. The first one is used to encrypting the image. The second one is used to encrypting the initial secret key and owner's signature that permit authentication. The implementation on a Cyclone III FPGA uses 18.594 of total logic elements, 17.820 of total combinatorial functions, and 131.616 of total memory. It runs at a frequency of 147.16 MHz, consumes 171.16 mW and can achieve excellent throughput of 1.71 Gb / s. Results prove that the proposed cipher framework is appropriate for embedded systems respecting both real-time performance and resources constrained. The security analysis is successfully performed and experimental results prove that the suggested technique provides the basis of cryptography.

Asymmetric cryptography is inherently slow because of its associated complex computing, while symmetric cryptography is speedy. However, the latter is suffering from a serious gap which is secure key exchange. To deal with this problem, we suggest an efficient hybrid AES-ECC cryptosystem combining the benefits of the symmetric advanced encryption standard (AES) to speed-up data encryption and the asymmetric elliptic curve cryptography (ECC) to secure the symmetric key session interchange. The proposed hybrid AES-ECC cryptosystem uses a co-design approach and relies on AES-ECC optimisations. We fundamentally mix the matrix multiplication of the AES MixColumns with the S-box allowing for very fast software implementation (on NIOS-II processor). Then, we propose an optimised ECC hardware architecture based on López-Dahab scalar multiplication (on Cyclone IV.E). The implementation results of the proposed cryptosystem afford an interesting trade-off between area, speed, and power and can be used for information and computer security.

In pattern recognition literature, it is well known that a finite number of training samples cause practical difficulties in designing a classifier. Moreover, the generalization error of the classifier tends to increase as the number of features gets large. We study the generalization error of several classifiers (MLPNN, RBFNN, K NN) in high dimensional spaces, under a practical condition: the ratio of the training sample to the dimensionality is small. Experimental results show that the generalization error of neuronal classifiers decreases as a function of dimensionality while it increases for statistical classifiers.