Industry tends to optimize accuracy and time efficiency of every process analyzing its constraints and limits. Several tasks requiring high precision and reproducibility must be automated. In the context of secure Integrated Circuits (ICs) characterization, tasks such as power analysis are commonly automated. However, very few automations exist for tools calibration, while recent characterization schemes encounter mechanical constraints. Computer vision, flexible tool used in various fields, gives opportunities to address these constraints. In the case of laser fault injections, several positioning adjustments are required to ensure a maximal energy transmission in a targeted point. An accurate focalization of the laser beam is reached by using an autofocus system. Such a system is obtained by analyzing the camera view of the IC in the time-frequency domain. Whatever the method to disturb an IC, every secure characterization should be reproducible. By exploiting computer vision assistance, fault injection can be automated by mixing vision techniques to build a full or partial view of an IC and automatically identify the targeted IC and focus the perturbation on a chosen pattern in the image. A reliable pattern detection is implemented by studying spatial consistency of image's remarkable features represented by graphs. This paper presents several computer vision techniques to address above problems.

This paper addresses the detection of noisy structures in the context of infrared microscopy using labeled undirected graph matching. The selection of robust features as labels is determinant in this case of study, where hard conditions are dealt with: few relevant topological information, a potentially huge number of outliers and low contrasted images resulting in noisy graphs. Firstly, the image texture is reliably caught through a scale, rotation and intensity invariant histogram of oriented gradients. Secondly, in structures presenting numerous symmetries, the graph shape is locally registered while discriminated using weight from a super-increasing series. Coupled to the flexibility of the graph tensor product-based similarity metric, the matching framework achieves satisfying results.

Autofocus (AF) is a widely investigated subject in the fields of natural scene images, industrial assembly and biologic microscopy. This paper proposes a new effective AF method for infrared (IR) microscopy in the context of the Integrated Circuit industry (IC). The proposed method operates in the wavelet domain using a custom orthogonal wavelet for the 2D Discrete Wavelet Transform (DWT). The quality criterion of our AF algorithm relies on the standard deviance of the DWT coefficients, computed per subband and per level. Tested on several optical magnifying lenses, our method is robust time-efficient, and usable on-the-fly in the IC location system.

Chosen-Message Simple Power Analysis, also called Collision Based Attacks (CBA), have been proposed by Fouque, Yen and Homma. These attacks aim at inducing and detecting collisions during modular operations. However, detecting collisions is a challenging task in real environments. Doing it in an automated manner is even more challenging. In this paper, we propose and compare some methods and criteria allowing to automatically (without any visual inspection) detect the occurrence of collisions in leakage traces acquired on modern (and thus noisy) circuits.

Fault attacks are widely deployed against secure devices by hardware evaluation centers. While the least expensive fault injection techniques, like clock or voltage glitches, are well taken into account in secure devices by dedicated hardware counter-measures, more advanced techniques, such as light based attacks, require huge investments. This paper presents a new way to induce faults at a moderate cost that may defeat already in place hardware counter-measures. To demonstrate its effectiveness we applied this technique on an ASIC component. For this demonstration, fault exploitation is operated using the classic Bell core attack applied on a modular exponentiation supported by a modular arithmetic co-processor.