EDBT 2026 Demo / reviewers in the wild / expert
José I. Acha
dblp:32/913 · also José I. Acha-Catalina, José Ignacio Acha
· DBLP profile ↗
13ranked-venue papers
2as first author
0since 2021 · last 2012
0000-0001-8115-6725ORCID · verified
Domains — the database's venue-derived domains; a paper can count in several
Graphics, computer vision, multimedia, augmented reality and games · 5 · 1 first-authorArtificial intelligence and machine learning · 4Systems, architecture and hardware · 3 · 1 first-authorComputer networks · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer networks
1 paper |
Physical-layer communications · 100% | |
| Computer architecture, parallel and distributed computing, and storage systems
3 papers |
Integrated circuit design · 89% Electronic design automation · 11% |
Topics — the 9 heaviest of 9, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Physical-layer communications › MIMO
diversity-multiplexing tradeoff |
0.1 | 1 | 2009 | Linear IIR Precoding for Non-Redundant Transmission over Minimum-Phase Channels in Wireline Multitone Systems · IEEE Trans. Commun. 2009 |
Physical-layer communications › modulation
multicarrier modulation |
0.1 | 1 | 2009 | Linear IIR Precoding for Non-Redundant Transmission over Minimum-Phase Channels in Wireline Multitone Systems · IEEE Trans. Commun. 2009 |
Physical-layer communications › MIMO
precoding |
0.1 | 1 | 2009 | Linear IIR Precoding for Non-Redundant Transmission over Minimum-Phase Channels in Wireline Multitone Systems · IEEE Trans. Commun. 2009 |
Physical-layer communications › interference
intersymbol interference |
0.0 | 1 | 2009 | Linear IIR Precoding for Non-Redundant Transmission over Minimum-Phase Channels in Wireline Multitone Systems · IEEE Trans. Commun. 2009 |
Integrated circuit design
asynchronous circuit design |
0.0 | 2 | 1986 | Asynchronous Modular Arbiter · IEEE Trans. Computers 1986 Self-Synchronization of Asynchronous Sequential Circutis Employing a General Clock Function · IEEE Trans. Computers 1976 |
Integrated circuit design
metastability |
0.0 | 1 | 1986 | Asynchronous Modular Arbiter · IEEE Trans. Computers 1986 |
Integrated circuit design
digital circuit design |
0.0 | 1 | 1976 | On Input and Next-State Equations of the R-S Type M-Stable · IEEE Trans. Computers 1976 |
Integrated circuit design › digital circuit design
sequential circuit design |
0.0 | 1 | 1976 | On Input and Next-State Equations of the R-S Type M-Stable · IEEE Trans. Computers 1976 |
Electronic design automation › logic synthesis
sequential circuit synthesis |
0.0 | 1 | 1976 | Self-Synchronization of Asynchronous Sequential Circutis Employing a General Clock Function · IEEE Trans. Computers 1976 |
Methods — techniques the papers use, named apart from their topics
bit and power loading · 0.1IIR precoding · 0.1modular design · 0.0modular implementation · 0.0general clock function · 0.0don't-care condition generalization · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2012 | Efficient real data filtering using complex-input discrete Fourier transforms
Francisco J. Simois, José I. Acha |
Signal Process. | 2 |
| 2011 | A New Algorithm for Real Data Convolutions With j -CirculantsabstractA new algorithm for efficient linear convolution of real signals is presented. It is shown that the circulant required in traditional overlap-and-save (OLS) and overlap-and-add (OLA) methods can be substituted by aj-circulant, that is, a circulant matrix where the shifted elements are multiplied by the imaginary unit. Suchj-circulant can be implemented easily and efficiently with half-length complex Fast Fourier Transforms. The latency remains the same as that of OLS and OLA. This method results in computational savings when compared to OLA and OLS, reducing the total arithmetic operations and particularly the execution time. Francisco J. Simois, José I. Acha |
IEEE Signal Process. Lett. | 2 |
| 2009 | Linear IIR Precoding for Non-Redundant Transmission over Minimum-Phase Channels in Wireline Multitone SystemsabstractDiscrete multitone (DMT) systems need the use of a guard interval, known as cyclic prefix (CP), to avoid intersymbol interference (ISI) and interchannel interference (ICI). Unfortunately, this prefix produces a decrease in the achievable bandwidth efficiency. To overcome this problem, we present in this paper an IIR linear precoder that adds memory in the time-domain, avoiding the need of a guard time. It is shown that the received signal with this precoder and the received signal in a DMT system that uses CP are identical, so perfect reconstruction is possible in a noise-free situation. In addition, the behavior of this scheme in presence of noise is the same as in a DMT system with CP, allowing the use of bit and power loading algorithms. It is also proved that the only condition for the precoder stability is that the channel is minimum-phase. As an example, it is shown the good performance of this algorithm in an ADSL environment. Francisco J. Simois, José I. Acha |
IEEE Trans. Commun. | 2 |
| 2006 | Maximization of statistical moments for blind separation of sources revisited
Susana Hornillo-Mellado, Rubén Martín-Clemente, Carlos García Puntonet, José I. Acha, Juan Manuel Górriz |
Neurocomputing | 4 |
| 2004 | Eigendecomposition of self-tuned cumulant-matrices for blind source separation
Rubén Martín-Clemente, José I. Acha, Carlos García Puntonet |
Signal Process. | 2 |
| 2003 | Neural Net with Two Hidden Layers for Non-Linear Blind Source Separation
Rubén Martín-Clemente, Susana Hornillo-Mellado, José I. Acha, Fernando Rojas Ruiz, Carlos García Puntonet |
ESANN | 3 |
| 2003 | Neural net with two hidden layers for non-linear blind source separationabstractIn this paper, we present an algorithm that minimizes the mutual information between the outputs of a multilayer perceptron (MLP). The neural network is then used as separating system in the nonlinear blind source separation problem. It has been reported that MLPs with one hidden layer are sufficient to achieve desirable performance. However, in some cases, we may prefer approximating nonlinear mappings by using networks with several hidden layers. For the sake of simplicity, the present paper is focused on MLPs with two hidden layers. The performance is illustrated by some experiments. Rubén Martín-Clemente, Susana Hornillo-Mellado, José I. Acha, Carlos García Puntonet |
IJCNN | 3 |
| 2002 | New equations and iterative algorithm for blind separation of sources
Rubén Martín-Clemente, José I. Acha |
Signal Process. | 2 |
| 2001 | Blind Separation of Sources by Differentiating the Output Cumulants and Using Newton's Method
Rubén Martín-Clemente, José I. Acha, Carlos García Puntonet |
ICANN | 2 |
| 1997 | Design of log FIR filters
José I. Acha, Rubén Martín-Clemente |
Signal Process. | 1 |
| 1986 | Asynchronous Modular ArbiterabstractA practical N-user arbiter and its implementation are presented in this correspondence. Because of the asynchronous character of its input variables (request signals), the design proposed is asynchronous and keeps in mind the possibility of metastable operations. The structure of the arbiter is very simple and modular. J. Calvo, José I. Acha, Manuel Valencia-Barrero |
IEEE Trans. Computers | 2 |
| 1976 | On Input and Next-State Equations of the R-S Type M-StableabstractThis correspondence proposes a generalization of the normal DON'T CARE condition and develops the input and next-state equations for a R-S type M-stable. An example is used to clarify the application of such a device to sequential machine inplementation. José I. Acha, José Luis Huertas |
IEEE Trans. Computers | 1 |
| 1976 | Self-Synchronization of Asynchronous Sequential Circutis Employing a General Clock FunctionabstractA self-synchronization model is developed. It is based on a general clock function which depends only on the state variables. This function is associated with the flip-flop type to be used and is independent of the flow table. A modular implementation which uses integrated circuits is obtained. With this technique, the synthesis procedures for synchronous machines can be directly applicable to asynchronous circuits without taking care of the critical races and essential hazards. José Luis Huertas, José I. Acha |
IEEE Trans. Computers | 2 |