EDBT 2026 Demo / reviewers in the wild / expert
Heetae Kim
dblp:32/9558
· DBLP profile ↗
3ranked-venue papers
1as first author
1since 2021 · last 2025
—ORCID · conflict
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 2 · 1 first-author · 1 since 2021Human-computer interaction and ubiquitous computing · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Electronic design automation · 95% Integrated circuit design · 3% Hardware reliability and fault tolerance · 3% |
Topics — the 6 heaviest of 6, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Electronic design automation
hardware verification and test |
1.2 | 2 | 2025 | An Efficient Test Scheduling Method Based on Dynamic Pairing · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2025 Thermal Aware Test Scheduling for NTV Circuit · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2018 |
Electronic design automation › hardware verification and test
test scheduling |
1.2 | 2 | 2025 | An Efficient Test Scheduling Method Based on Dynamic Pairing · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2025 Thermal Aware Test Scheduling for NTV Circuit · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2018 |
Electronic design automation › hardware verification and test
system-on-chip testing |
0.9 | 1 | 2025 | An Efficient Test Scheduling Method Based on Dynamic Pairing · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2025 |
Electronic design automation › hardware verification and test › test scheduling
thermal-aware test scheduling |
0.3 | 1 | 2018 | Thermal Aware Test Scheduling for NTV Circuit · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2018 |
Integrated circuit design › low-power circuit design
near-threshold voltage design |
0.1 | 1 | 2018 | Thermal Aware Test Scheduling for NTV Circuit · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2018 |
Hardware reliability and fault tolerance › reliability analysis
thermal reliability |
0.1 | 1 | 2018 | Thermal Aware Test Scheduling for NTV Circuit · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2018 |
Methods — techniques the papers use, named apart from their topics
heuristic algorithm · 0.9dynamic pairing · 0.9thermal simulation · 0.3
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2025 | An Efficient Test Scheduling Method Based on Dynamic PairingabstractTest scheduling is a process that manages tests within a System-on-Chip (SoC) to minimize test time by allocating test resources and adjusting priorities. Efficient test scheduling offers cost saving opportunities by reducing test time without compromising test coverage. Since test scheduling is a NP-hard problem, conventional methods adopt optimization or heuristic algorithms that leverage metrics of each test. However, due to the interdependence of tests based on how limited resources are allocated, finding the optimal solution to minimize test time is challenging. In this article, a dynamic pairing algorithm is proposed to consider the mutual influence of tests on each other in the test scheduling process. The proposed method identifies the available test resources for a specific pair and minimizes the test time of the paired modules under identified constraints. Additionally, the proposed algorithm employs a heuristic-based approach to test scheduling to reduce the CPU time needed for scheduling. The proposed heuristic algorithm sequentially schedules test target modules and determines the optimal test schedule through dynamic pairing. Experiments have been carried out on diverse benchmarks and under various constraint conditions. The results indicate that the proposed method achieves shorter test times on average in comparison to conventional methods. Heetae Kim, Hyojoon Yun, Doohyun Yoon, Sungho Kang 0001 |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 1 |
| 2018 | Thermal Aware Test Scheduling for NTV CircuitabstractAlthough the near threshold voltage (NTV) design has achieved energy efficiency, certain challenges remain regarding its application. In this paper, we describe the analysis of thermally induced reliability concern in test process. In an NTV environment, the thermal dependency of a circuit delay is changed, and a difference in thermal constraints from that in a nominal voltage design exists. In addition, we propose a new test scheduling method for NTV circuits that alleviates the thermal constraints in system-on-chip test processes. Our simulation results show that the test time could be reduced while minimizing the reliability loss. Jaeil Lim, Hyunggoy Oh, Heetae Kim, Sungho Kang 0001 |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 3 |
| 2015 | Understanding driver adoption of car navigation systems using the extended technology acceptance modelabstractThis study proposes an integrated research model for investigating driver adoption of car navigation systems. We consider the potential causal connections between core cognitive and psychological factors and driver intention to use these systems. We extracted possible factors that may significantly affect the perceived usability of car navigation systems from in-depth interviews with two groups of individuals: an expert group and a driver group. Data collected from N = 1045 drivers via an online survey were analysed by structural equation modelling. The results showed that the service & display quality components of the systems were the most significant determinants of driver attitude and intention to use car navigation systems. Two other factors, namely attitude and perceived usefulness, also had impacts on driver intention. Moreover, both satisfaction and service & display quality were affected by perceived system reliability, while usefulness was affected by both perceived locational accuracy and satisfaction. Satisfaction also significantly affected perceived ease of use. In addition, we introduced new external variables to the technology acceptance model (TAM) and validated the causal connections proposed by the original TAM. The present study provides valuable insights into the core factors that significantly affect driver perspectives of and intention to use car navigation systems. Eunil Park, Heetae Kim, Jay Ohm |
Behav. Inf. Technol. | 2 |