Haochun Liang

dblp:320/9977 · DBLP profile ↗
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8ranked-venue papers
2as first author
8since 2021 · last 2026
0009-0005-2366-9780ORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 5 · 2 first-author · 5 since 2021Applied, interdisciplinary, general and emerging computing · 2 · 2 since 2021Theory of computation · 1 · 1 since 2021
YearPublicationVenuePosition
2026 Flexible Zero-Copy IPC for Processing Chains in ROS 2
abstract
As ROS 2 becomes increasingly adopted in safety-critical real-time systems, the performance of its communication layer, especially inter-process communication (IPC), has emerged as a key bottleneck. While intra-process communication benefits from zero-copy transmission, IPC suffers from significant latency due to serialization and memory copying. Existing shared memory approaches offer limited support for ROS 2 applications, as they impose strict constraints on message formats (e.g., requiring statically sized, POD-compatible types) and overlook end-to-end communication across multi-stage pipelines. In this work, we propose a novel and flexible architecture for enabling zero-copy IPC in ROS 2. Our design supports dynamically structured and non-POD message types, integrates seamlessly with the existing communication framework, and requires no modification to application logic. It consists of a Mini Memory Management System (MMS) for shared memory handling and a Message Propagation Adapter (MPA) that ensures compatibility with the ROS 2 communication framework. Our experimental results show that our method significantly reduces communication latency and supports efficient end-to-end message propagation.
Xiantong Luo, Xu Jiang 0004, Haochun Liang, Yue Tang 0001, Nan Guan, Wang Yi 0001
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.3
2025 Analysis and optimization of communication delay in multi-subscriber environments of ROS 2
Xiantong Luo, Xu Jiang 0004, Yue Tang 0001, Haochun Liang, Nan Guan, Wang Yi 0001
J. Syst. Archit.4
2025 New Scheduling Algorithm and Analysis for Partitioned Periodic DAG Tasks on Multiprocessors
abstract
Real-time systems are increasingly shifting from single processors to multiprocessors, where software must be parallelized to fully exploit the additional computational power. While the scheduling of real-time parallel tasks modeled as directed acyclic graphs (DAGs) has been extensively studied in the context of global scheduling, the scheduling and analysis of real-time DAG tasks under partitioned scheduling remain far less developed compared to the traditional scheduling of sequential tasks. Existing approaches primarily target plain fixed-priority partitioned scheduling and often rely on self-suspension–based analysis, which limits opportunities for further optimization. In particular, such methods fail to fully leverage fine-grained scheduling management that could improve schedulability. In this paper, we propose a novel approach for scheduling periodic DAG tasks, in which each DAG task is transformed into a set of real-time transactions by incorporating mechanisms for enforcing release offsets and intra-task priority assignments. We further develop corresponding analysis techniques and partitioning algorithms. Through comprehensive experiments, we evaluate the real-time performance of the proposed methods against state-of-the-art scheduling and analysis techniques. The results demonstrate that our approach consistently outperforms existing methods for scheduling periodic DAG tasks across a wide range of parameter settings.
Haochun Liang, Xu Jiang 0004, Xiantong Luo, Songran Liu, Nan Guan, Wang Yi 0001
IEEE Trans. Parallel Distributed Syst.1
2024 Timing Analysis of Cause-Effect Chains for External Events with Finite Validity Intervals
Xiantong Luo, Haochun Liang, Yue Tang 0001, Xu Jiang 0004, Nan Guan, Wang Yi 0001
SETTA2
2023 Response Time Analysis and Optimization of DAG Tasks Exploiting Mutually Exclusive Execution
abstract
There is an increasing move towards implementing embedded real-time systems upon multiprocessors with parallel applications, which are usually modeled as Directed Acyclic Graphs (DAGs). Plentiful work has been presented to optimize the bound of Worst-Case Response Time (WCRT) since the cornerstone work proposed by Graham in 1969. However, all these works are developed on the basis of Graham’s bound and failed to tackle the root of pessimism in it. In this work, we present a novel method to optimize the WCRT bound of a DAG task by designing mutually exclusive groups so that a sequential execution is enforced for some nodes, under which the problem of bounding WCRT becomes a problem of identifying a mutually exclusive path and thus does not suffer the pessimism in Graham’s bound. Experiments are conducted to evaluate the performance of our method against other WCRT optimization approaches in the state-of-the-art.
Haochun Liang, Xu Jiang 0004, Nan Guan, Qingqiang He, Wang Yi 0001
DAC1
2023 Modeling and Analysis of Inter-Process Communication Delay in ROS 2
abstract
ROS 2, the second-generation ROS, is a popular development framework for real-time robotic software. To ensure the timing correctness of applications based on ROS 2, one must model the time delay incurred by two aspects: computation and communication. While significant work has been conducted on computing delay, formal modeling and analysis of communication delay in ROS 2 is still an open issue. In this paper, we first present a formal description on the timing behavior of inter-process communication in ROS 2 with two typical communication policies, namely the InterestTree policy and FIFO policy, and then develop analysis techniques to upper-bound the incurred delay. We conduct experiments to validate the correctness and evaluate the efficacy of our method with case studies on realistic platform.
Xiantong Luo, Xu Jiang 0004, Nan Guan, Haochun Liang, Songran Liu, Wang Yi 0001
RTSS4
2023 Scheduling Parallel Real-Time Tasks on Virtual Processors
abstract
In many popular parallel programming models, e.g., OpenMP (OpenMP, 2013), applications are usually dispatched into several dedicated scheduling entities (named ”threads” in common) for which the processor time of physical platform is provided through the OS schedulers. This behavior requires for a hierarchical scheduling framework, considering each thread as a virtual processor (VP). Moreover, hierarchical scheduling allow separate applications to execute together on a common hardware platform, with each application having the “illusion” of executing on a dedicated component. However, the problem for scheduling parallel real-time tasks on virtual multiprocessor platform has not been addressed yet. An analogous approach to virtual scheduling for parallel real-time tasks is federeted scheudling, where each task exclusively executes on a set of dedicated physical processors. However, federated scheduling suffers significant resource wasting. In this article, we study the scheduling of real-time parallel task on virtual multiprocessors. As a physical processor is shared by virtual processors, tasks effectively share processors with each other. We conduct comprehensive performance evaluation to compare our proposed approach with existing methods of different types. Experiment results show that our approach consistently outperforms existing methods to a considerable extent under a wide range of parameter settings.
Xu Jiang 0004, Haochun Liang, Nan Guan, Yue Tang 0001, Lei Qiao 0002, Wang Yi 0001
IEEE Trans. Parallel Distributed Syst.2
2021 Virtually-Federated Scheduling of Parallel Real-Time Tasks
abstract
Federated scheduling is a promising approach to schedule parallel real-time tasks, where each task exclusively executes on a set of dedicated processors. However, federated scheduling suffers significant resource wasting since a task typically only uses part of the processing capacity allocated to it, while the unused part cannot be shared with other tasks. To solve this problem, we present a virtually-federated scheduling approach, which both enjoys the good analyzability of federated scheduling and allows tasks to efficiently share processors with others. The main idea is to construct virtual processors on physical processors, and let a task exclusively execute on a set of virtual processors. As a physical processor is shared by virtual processors, tasks effectively share processors with each other. On the other hand, as each task exclusively executes on its own virtual processor set, the good analyzability of federated scheduling can be carried into to our virtually-federated scheduling approach. We conduct comprehensive performance evaluation to compare our proposed approach with existing methods of different types. Experiment results show that our approach consistently outperforms existing methods to a considerable extent under a wide range of parameter settings.
Xu Jiang 0004, Nan Guan, Haochun Liang, Yue Tang 0001, Lei Qiao 0002, Wang Yi 0001
RTSS3