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Abhijith Somashekhar

dblp:321/4257 · DBLP profile ↗
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1ranked-venue papers
0as first author
1since 2021 · last 2022
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 since 2021Software engineering, systems software and programming languages · 1 · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Embedded and real-time systems · 50% Memory systems · 25% Processor architecture and microarchitecture · 25%

Topics — the 4 heaviest of 5, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Embedded and real-time systems
energy harvesting systems
0.612022
NvMR: non-volatile memory renaming for intermittent computing · ISCA 2022
Embedded and real-time systems
intermittent computing
0.612022
NvMR: non-volatile memory renaming for intermittent computing · ISCA 2022
Processor architecture and microarchitecture › memory system microarchitecture
memory renaming
0.612022
NvMR: non-volatile memory renaming for intermittent computing · ISCA 2022
Memory systems
non-volatile memory
0.612022
NvMR: non-volatile memory renaming for intermittent computing · ISCA 2022

Methods — techniques the papers use, named apart from their topics

persistence dependency characterization · 0.6
YearPublicationVenuePosition
2022 NvMR: non-volatile memory renaming for intermittent computing
abstract
Intermittent systems on energy-harvesting devices have to frequently back up data because of an unreliable energy supply to make forward progress. These devices come with non-volatile memories like Flash/FRAM on board that are used to back up the system state. However, quite paradoxically, writing to a non-volatile memory consumes a lot of energy that makes backups expensive. Idem-potency violations inherent to intermittent programs are major contributors to the problem, as they render system state inconsistent and force backups to occur even when plenty of energy is available. In this work, we first characterize the complex persist dependencies that are unique to intermittent computing. Based on these insights, we propose NvMR, an intermittent architecture that eliminates idempotency violations in the program by renaming non-volatile memory addresses. This can reduce the number of backups to their theoretical minimum and decouple the decision of when to perform backups from the memory access constraints imposed by the program. Our evaluations show that compared to a state-of-the-art intermittent architecture, NvMR can save about 20% energy on average when running common embedded applications.
Abhishek Bhattacharyya, Abhijith Somashekhar, Joshua San Miguel
ISCA2