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Jan F. Verweij

dblp:322/0873 · DBLP profile ↗
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1ranked-venue papers
1as first author
0since 2021 · last 1993
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Applied, interdisciplinary, general and emerging computing · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Hardware reliability and fault tolerance · 100%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Hardware reliability and fault tolerance
integrated circuit reliability		 0.011993
VLSI reliability in Europe · Proc. IEEE 1993
Hardware reliability and fault tolerance › reliability analysis
VLSI reliability		 0.011993
VLSI reliability in Europe · Proc. IEEE 1993
Hardware reliability and fault tolerance › device reliability
electrostatic discharge		 0.011993
VLSI reliability in Europe · Proc. IEEE 1993
Hardware reliability and fault tolerance › aging
oxide breakdown		 0.011993
VLSI reliability in Europe · Proc. IEEE 1993
YearPublicationVenuePosition
1993 VLSI reliability in Europe
abstract
Several issue's regarding VLSI reliability research in Europe are discussed. Organizations involved in stimulating the activities on reliability by exchanging information or supporting research programs are described. Within one such program, ESPRIT, a technical interest group on IC reliability was formed to formulate particular needs and necessary improvements in education and research. In addition to ESPRIT research projects, there are smaller projects on reliability subjects. Two examples, one dealing with plastic-encapsulation and the other with electrostatic discharge, are treated in some detail. Some achievements in the areas of oxide breakdown and plastic encapsulated ICs in temperature cycling are also presented. A few opinions are offered on trends in reliability engineering, including reliability circuit simulation.>
Jan F. Verweij
 Proc. IEEE1