EDBT 2026 Demo / reviewers in the wild / expert
Oliver Temam
dblp:322/0933
· DBLP profile ↗
1ranked-venue papers
1as first author
0since 2021 · last 1993
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Applied, interdisciplinary, general and emerging computing · 1 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Memory systems · 76% Performance modeling and evaluation · 19% High-performance computing · 6% |
Topics — the 6 heaviest of 6, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Performance modeling and evaluation
analytical modeling |
0.0 | 1 | 1993 | Impact of cache interferences on usual numerical dense loop nests · Proc. IEEE 1993 |
Memory systems
cache |
0.0 | 1 | 1993 | Impact of cache interferences on usual numerical dense loop nests · Proc. IEEE 1993 |
Memory systems › memory system modeling
cache behavior prediction |
0.0 | 1 | 1993 | Impact of cache interferences on usual numerical dense loop nests · Proc. IEEE 1993 |
Memory systems › cache management
cache interference |
0.0 | 1 | 1993 | Impact of cache interferences on usual numerical dense loop nests · Proc. IEEE 1993 |
Memory systems › cache › cache behavior
cache miss analysis |
0.0 | 1 | 1993 | Impact of cache interferences on usual numerical dense loop nests · Proc. IEEE 1993 |
High-performance computing
scientific computing systems |
0.0 | 1 | 1993 | Impact of cache interferences on usual numerical dense loop nests · Proc. IEEE 1993 |
Methods — techniques the papers use, named apart from their topics
analytical modeling · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1993 | Impact of cache interferences on usual numerical dense loop nestsabstractIn numerical codes, the regular interleaved accesses that occur within do-loop nests induce cache interference phenomena that can severely degrade program performance. The authors identify cache interference phenomena and determine their causes and the conditions under which they occur. Based on these results, a methodology is derived for computing an analytical expression of cache misses for most classic loop nests, which can be used for precise performance analysis and prediction. It is shown that cache performance is unstable, because some unexpected parameters, such as arrays base address, can play a significant role in interference phenomena. It is also shown that the impact of cache interferences can be so high that the benefits of current data locality optimization techniques can be partially, if not totally, eradicated.> Oliver Temam, Christine Fricker, William Jalby |
Proc. IEEE | 1 |