Severin Kistler

dblp:322/8591 · DBLP profile ↗
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1ranked-venue papers
0as first author
1since 2021 · last 2022
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer networks
1 paper
Software-defined and programmable networks · 100%
Computer architecture, parallel and distributed computing, and storage systems
1 paper
Storage systems · 77% Cloud and datacenter computing · 23%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Software-defined and programmable networks
programmable data plane
0.612022
Building Blocks for Network-Accelerated Distributed File Systems · SC 2022
Software-defined and programmable networks › programmable data plane
SmartNIC offload
0.612022
Building Blocks for Network-Accelerated Distributed File Systems · SC 2022
Storage systems › file systems
distributed file system
0.612022
Building Blocks for Network-Accelerated Distributed File Systems · SC 2022
Cloud and datacenter computing
datacenter storage
0.212022
Building Blocks for Network-Accelerated Distributed File Systems · SC 2022

Methods — techniques the papers use, named apart from their topics

SmartNIC offloading · 1.1RDMA · 1.1
YearPublicationVenuePosition
2022 Building Blocks for Network-Accelerated Distributed File Systems
abstract
High-performance clusters and datacenters pose increasingly demanding requirements on storage systems. If these systems do not operate at scale, applications are doomed to become I/O bound and waste compute cycles. To accelerate the data path to remote storage nodes, remote direct memory access (RDMA) has been embraced by storage systems to let data flow from the network to storage targets, reducing overall latency and CPU utilization. Yet, this approach still involves CPUs on the data path to enforce storage policies such as authentication, replication, and erasure coding. We show how storage policies can be offloaded to fully programmable SmartNICs, without involving host CPUs. By using PsPIN, an open-hardware SmartNIC, we show latency improvements for writes (up to 2x), data replication (up to 2x), and erasure coding (up to 2x), when compared to respective CPU- and RDMA-based alternatives.
Salvatore Di Girolamo, Daniele De Sensi, Konstantin Taranov, Milos Malesevic, Maciej Besta, Timo Schneider, Severin Kistler, Torsten Hoefler
SC7