Shushu Yi

dblp:322/9768 · DBLP profile ↗
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8ranked-venue papers
3as first author
8since 2021 · last 2026
0000-0002-9061-924XORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 7 · 2 first-author · 7 since 2021Software engineering, systems software and programming languages · 2 · 1 first-author · 2 since 2021Databases, data management, data science and information retrieval · 1 · 1 since 2021
YearPublicationVenuePosition
2026 Xerxes: Extensive Exploration of Scalable Hardware Systems with CXL-Based Simulation Framework
Yuda An, Shushu Yi, Bo Mao 0003, Qiao Li 0001, Mingzhe Zhang 0005, Diyu Zhou, Ke Zhou 0001, Nong Xiao 0001, Guangyu Sun 0003, Yingwei Luo, Jie Zhang 0048
FAST2
2025 SPDK+: Low Latency or High Power Efficiency? We Take Both
abstract
SPDK, as one of the most efficient I/O storage software, is capable of delivering the lowest I/O latency. Unfortunately, the polling mechanism in SPDK wastes tremendous CPU clock cycles, especially under small I/O operations and low queue depths. Although SPDK supports the conventional interrupt method, it does not improve power efficiency under such circumstances. To address this issue, we propose SPDK+, which enables the user interrupt feature in the SPDK to achieve both low latency and high power efficiency. Specifically, SPDK+ employs user interrupt handling to directly process MSI-X interrupts from SSD devices and utilizes user wait instructions during IO wait periods to conserve power. The comprehensive evaluation results show that SPDK+ achieves up to 49.5% power efficiency improvement while keeping the I/O latency almost unchanged compared with SPDK.
Endian Li, Shushu Yi, Qiao Li 0001, Diyu Zhou, Zhenlin Wang 0003, Xiaolin Wang 0001, Bo Mao 0003, Yingwei Luo, Ke Zhou 0001, Jie Zhang 0048
HotStorage2
2025 XHarvest: Rethinking High-Performance and Cost-Efficient SSD Architecture with CXL-Driven Harvesting
abstract
The occasional nature of I/O bursts in production clusters makes the substantial and expensive SSD internal hardware resources (e.g., computation and memory resources) always underutilized, resulting in cost inefficiency.Open-Channel SSD (OCSSD), as a pioneering solution, removes the SSD internal resources but rather leverages the host-side resources to serve I/O requests.Unfortunately, it faces adoption obstacles due to the heavy resource contention with user applications, hampered host-SSD collaboration, and proprietary firmware leakage risks.Tackling these challenges, we propose XHarvest, a new cost-efficient and high-performance SSD architecture, which harnesses compute express link (CXL) and trusted execution environment (TEE) to facilitate dynamic, efficient, and secure host resource harvesting.It reserves moderate SSD internal resources to isolate SSD internal tasks and applications under regular I/O loads while coping with occasional I/O bursts via dynamic host resource harvesting.To this end, XHarvest executes the firmware within the host-side TEE without disclosing sensitive
Shushu Yi, Xianzhang Chen, Chenxi Wang 0005, Shengwen Liang, Zhe Wang 0017, Nong Xiao 0001, Qiao Li 0001, Mingzhe Zhang 0005, Jie Zhang 0048
ISCA3
2024 StreamPIM: Streaming Matrix Computation in Racetrack Memory
abstract
Racetrack memory (RM) techniques have become promising solutions to resolve the memory wall issue as they increase memory density, reduce energy consumption and are capable of building processing-in-memory (PIM) architectures. RM can place arithmetic logic units in or near its memory arrays to process tasks offloaded by the host. While there already exist multiple studies of processing in RM, these solutions, unfortunately, suffer from data transfer overheads imposed by the loose coupling of the memory core and the computation units. To address this issue, we propose StreamPIM, a new processing-in-RM architecture, which tightly couples the memory core and the computation units. Specifically, StreamPIM directly constructs a matrix processor from domain-wall nanowires without the usage of CMOS-based computation units. It also designs a domainwall nanowire-based bus, which can eliminate electromagnetic conversion. StreamPIM further optimizes the performance by leveraging RM internal parallelism. Our evaluation results show that StreamPIM achieves 39.1 × higher performance and saves 58.4 × energy consumption, compared with the traditional computing platform.
Yuda An, Yunxiao Tang, Shushu Yi, Xiurui Pan, Guangyu Sun 0003, Zhaochu Luo, Qiao Li 0001, Jie Zhang 0048
HPCA3
2024 BIZA: Design of Self-Governing Block-Interface ZNS AFA for Endurance and Performance
abstract
All-flash array (AFA) has become one of the most popular storage forms in diverse computing domains. While traditional AFA implementations adopt the block interface to seamlessly integrate with most existing software, this interface hinders the host from managing SSD internal tasks explicitly, which results in both short endurance and poor performance. In comparison, ZNS AFA, such as RAIZN, adopts ZNS SSDs and exposes the ZNS interface to the users. This solution attempts to raise the level of responsibility for SSD management. Unfortunately, it faces severe compatibility issues as most upper-layer software only takes block I/O accesses for granted.
Shushu Yi, Shaocong Sun, Yingbo Sun, Ming-Chang Yang, Zhichao Cao 0002, Qiao Li 0001, Myoungsoo Jung, Ke Zhou 0001, Jie Zhang 0048
SOSP1
2024 ScalaAFA: Constructing User-Space All-Flash Array Engine with Holistic Designs
Shushu Yi, Xiurui Pan, Qiao Li 0001, Chenxi Wang 0005, Bo Mao 0003, Myoungsoo Jung, Jie Zhang 0048
USENIX ATC1
2022 ScalaRAID: optimizing linux software RAID system for next-generation storage
abstract
RAID has been widely adopted to enhance the performance, capacity, and reliability of the existing storage systems. However, we observe that the Linux software RAID (mdraid) suffers from its poor implementation of the lock mechanism. To address this, we propose ScalaRAID, which refines the role domain of locks and designs a new data structure to prevent different threads from preempting the RAID resources. By doing so, ScalaRAID can maximize the thread-level parallelism and reduce the time consumption of I/O request handling. Our evaluation results reveal that ScalaRAID can improve throughput by 89.4% while decreasing 99.99th percentile latency by 85.4% compared to mdraid.
Shushu Yi, Yanning Yang, Yunxiao Tang, Chen Yue, Myoungsoo Jung, Jie Zhang 0048
HotStorage1
2022 Survey on storage-accelerator data movement
Shushu Yi, Jie Zhang 0048
CCF Trans. High Perform. Comput.2