EDBT 2026 Demo / reviewers in the wild / expert
Nils Hölscher
dblp:324/3146
· DBLP profile ↗
3ranked-venue papers
2as first author
3since 2021 · last 2026
0000-0002-6397-5134ORCID · corroborated
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 3 · 2 first-author · 3 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Memory systems · 75% Storage systems · 25% |
Topics — the 4 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Memory systems
main memory |
0.7 | 1 | 2023 | Memory Carousel: LLVM-Based Bitwise Wear Leveling for Nonvolatile Main Memory · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2023 |
Memory systems › non-volatile memory
non-volatile main memory |
0.7 | 1 | 2023 | Memory Carousel: LLVM-Based Bitwise Wear Leveling for Nonvolatile Main Memory · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2023 |
Memory systems
non-volatile memory |
0.7 | 1 | 2023 | Memory Carousel: LLVM-Based Bitwise Wear Leveling for Nonvolatile Main Memory · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2023 |
Storage systems › flash and SSD › flash memory management
wear leveling |
0.7 | 1 | 2023 | Memory Carousel: LLVM-Based Bitwise Wear Leveling for Nonvolatile Main Memory · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2023 |
Methods — techniques the papers use, named apart from their topics
bitwise rotation · 0.7LLVM compiler passes · 0.7
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2026 | Releaser Design and Schedulability Analysis for Care-Taking Tasks in Real-Time SystemsabstractCyber-physical systems typically have non-functional tasks to infrequently take care of some hardware and software components for maintaining correct functionality. For example, infrequently, sensors must be calibrated and endurance-limited memories must be wear-leveled. We study how a real-time system, consisting of care-taking tasks and sporadic real-time tasks, can be optimized and analyzed. We introduce a novel model to describe such systems and show how to intuitively utilize existing real-time scheduling theory to guarantee timeliness in this scenario. This is, however, very pessimistic since the care-taking tasks are executed infrequently, compared to the sporadic tasks utilizing the same components. We, therefore, examine how to properly handle care-taking tasks by controlling when to release them to avoid unnecessary interference spikes by proposing a low-overhead care-taking-task releaser. We demonstrate the improvements of schedulability using synthetic benchmarks, supported by an implementation for the proposed care-taking-task releaser in FreeRTOS and a case study for non-volatile memory. Nils Hölscher, Kay Heider, Georg von der Brüggen, Mario Günzel, Kuan-Hsun Chen, Jian-Jia Chen |
RTAS | 1 |
| 2024 | Sync or Sink? The Robustness of Sensor Fusion Against Temporal MisalignmentabstractSensor fusion is the process of combining data from multiple sensors for acquiring a more accurate and comprehensive understanding of the observed environment. However, temporal misalignments between sensors can lead to incorrect fusion results, while the temporal robustness of sensor fusion algorithms is still a relatively unexplored research topic. To address this gap, we define three types of temporal robustness for sensor fusion: reference-point-based, strong sample-point-based, and weak sample-point-based temporal robustness. These definitions provide a framework to quantitatively evaluate the temporal robustness of sensor fusion functions. We also investigate the case where only a part of the sensors are misaligned. Furthermore, we consider potential probabilistic aspects for the proposed definitions. We assess the temporal robustness of a state-of-the-art fusion method in the context of 3D object detection, where camera and LiDAR data are fused. Our empirical evaluation shows that the examined fusion methods exhibit moderate robustness against temporal misalignment of images, but are especially sensitive to LiDAR misalignment. Our findings call attention to the necessity of providing robustness guarantees for sensor fusion functions against temporal misalignment. Daniel Kuhse, Nils Hölscher, Mario Günzel, Harun Teper, Georg von der Brüggen, Jian-Jia Chen, Ching-Chi Lin |
RTAS | 2 |
| 2023 | Memory Carousel: LLVM-Based Bitwise Wear Leveling for Nonvolatile Main MemoryabstractEmerging non-volatile memory yields, alongside many advantages, technical shortcomings, such as reduced cell lifetime. Although many wear-leveling approaches exist to extend the lifetime of such memories, usually a trade-off for the granularity of wear-leveling has to be made. Due to iterative write schemes (repeatedly sense and write), wear-out of memory in certain systems is directly dependent on the written bit value and thus can be highly imbalanced, requiring dedicated bit-wise wear-leveling. Such a bit-wise wear-leveling so far has only be proposed together with a special hardware support. However, if no dedicated hardware solutions are available, especially for commercial off-the-shelf systems with non-volatile memories, a software solution can be crucial for the system lifetime. In this work, we propose entirely software-based bit-wise wearleveling, where the position of bits within CPU words in main memory is rotated on a regular basis. We leverage the LLVM intermediate representation to adjust load and store operations of the application with a custom compiler pass. Experimental evaluation shows that the lifetime by applying local rotation within the CPU word can be extended by a factor of up to 21×. We also show that our method can incorporate with coarser-grained wear-leveling, e.g. on block granularity and assist achievement of higher lifetime improvements. Nils Hölscher, Christian Hakert, Hassan Nassar, Kuan-Hsun Chen, Lars Bauer, Jian-Jia Chen, Jörg Henkel |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 1 |