Demonstration venue · read-only. Every page can be browsed; the buttons that would change it are switched off. Create an account to run TaxoReview on your own data. A simulation from public publication records: the people listed were not invited and did not agree to review.
? Tutorial for this page

Richard L. Hellier

dblp:324/7162 · DBLP profile ↗
← Back
1ranked-venue papers
0as first author
0since 2021 · last 1991
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Applied, interdisciplinary, general and emerging computing · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Parallel and multicore computing · 100%

Topics — the 2 heaviest of 2, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Parallel and multicore computing
parallel programming models
0.011991
Efficient high-level programming on the AMT DAP · Proc. IEEE 1991
Parallel and multicore computing › data-parallel programming
SIMD programming
0.011991
Efficient high-level programming on the AMT DAP · Proc. IEEE 1991

Methods — techniques the papers use, named apart from their topics

virtual systems architecture · 0.0
YearPublicationVenuePosition
1991 Efficient high-level programming on the AMT DAP
abstract
This study is concerned with efficient use of a high-level machine-independent language in the AMT DAP (distributed array processor) series of computers. The AMT DAP is a single instruction multiple data stream computer. The recent enhancement of Fortran-Plus is described. This enhancement removed the restrictions on array shapes and sizes, giving a language which is independent of the available hardware parallelism. The enhanced Fortran-Plus has been implemented on the AMT DAP using the concept of the virtual systems architecture (VSA). The power of enhanced Fortran-Plus in expressing parallel algorithms is demonstrated in certain application areas. To show that the higher level of language has been implemented on the general VSA system without compromising performance, the performance of these codes is discussed for a range of problem sizes.>
Peter M. Flanders, Richard L. Hellier, Huw D. Jenkins, Cliff J. Pawlin, Sven van den Berghe
Proc. IEEE2