Yueh-Ting Hou

dblp:324/9377 · DBLP profile ↗
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1ranked-venue papers
0as first author
1since 2021 · last 2022
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Memory systems · 100%

Topics — the 3 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Memory systems › non-volatile memory › magnetic random access memory › STT-MRAM
MLC STT-RAM
0.612022
Alternative Encoding: A Two-Step Transition Reduction Scheme for MLC STT-RAM Cache · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2022
Memory systems
non-volatile memory
0.612022
Alternative Encoding: A Two-Step Transition Reduction Scheme for MLC STT-RAM Cache · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2022
Memory systems › cache
STT-RAM cache
0.612022
Alternative Encoding: A Two-Step Transition Reduction Scheme for MLC STT-RAM Cache · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2022

Methods — techniques the papers use, named apart from their topics

alternative encoding · 0.6
YearPublicationVenuePosition
2022 Alternative Encoding: A Two-Step Transition Reduction Scheme for MLC STT-RAM Cache
abstract
Although multiple-level-cell (MLC) STT-RAM increases data density, it suffers from the two-step transition (TT) issue. It is because hard domain and soft domain of an MLC STT-RAM cell cannot be flipped to the opposite magnetization direction at the same time. Thus, the soft domain has to be flipped twice to the opposite magnetization direction of the hard domain. The TT problem hurts the lifetime of MLC STT-RAM due to additional flips on soft domains. To mitigate the TT problem of MLC STT-RAM, we propose an alternative encoding scheme (AES) to reduce the occurrence of TTs. AES utilizes the encoding method to eliminate most TTs and distributes unavoidable TTs among cells evenly to improve the lifetime of MLC STT-RAM cache. The experimental results showed that the proposed scheme achieved a great lifetime improvement than the related work.
Jen-Wei Hsieh, Yueh-Ting Hou, Tai-Chieh Chang
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.2