EDBT 2026 Demo / reviewers in the wild / expert
Naoko Misawa
dblp:326/9537
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6ranked-venue papers
2as first author
6since 2021 · last 2025
—ORCID · conflict
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 5 · 2 first-author · 5 since 2021Applied, interdisciplinary, general and emerging computing · 1 · 1 since 2021
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2025 | Transformer Hetero-CiM: Heterogeneous Integration of ReRAM CiM and SRAM CiM for Vision Transformer at Edge DevicesabstractThis paper proposes design of Transformer Hetero-Computation-in-Memory (CiM) for Vision Transformer (ViT) at edge devices. ViT achieves high inference accuracy using parallel processing. However, ViT is computationally intensive due to a huge number of multiply-accumulate (MAC) operations. Moreover, ViT has the diverse requirements of Read-MAC operation in linear & FC layers and Read/Write-MAC operation in self-attention. Thus, proposed Transformer Hetero-CiM overcomes the issues by heterogeneous integration system of MLC ReRAM CiM, SRAM CiM and digital processors. As a result, proposed Transformer Hetero-CiM achieves 97.9% inference accuracy with reducing 89.1% of array area. Naoko Misawa, Tao Wang 0126, Chihiro Matsui, Ken Takeuchi |
ASP-DAC | 1 |
| 2025 | VaLI: Variability-aware Fine-tuning with Low-rank Adapter and Iterative Training for ReRAM Computation-in-MemoryabstractThis paper proposes a novel algorithm called Variability-aware fine-tuning with Low-rank adapter and Iterative training (VaLI). Previous research applies variability-aware training (VAT) to tackle the difficulty in deploying AI models on non-volatile Computation-in-Memory (CiM) because of the device error introduced from non-idealities of non-volatile memory, e.g. ReRAM. To enable large AI models on the edge device, VaLI introduces Variability-Aware Fine-Tuning (VAFT) which extends the conventional VAT and saves training time. Moreover, VaLI incorporates Low-Rank Adapter (LoRA) to further reduce the excessive computation resources in the training, while proposing iterative training to improve the instability of VAFT with LoRA due to low-rank matrices. The proposed VaLI is evaluated across several models and datasets to showcase its effectiveness by reducing trainable parameters by an average of 90% while maintaining competitive model accuracy against device error. Naoko Misawa, Chihiro Matsui, Ken Takeuchi |
ISCAS | 2 |
| 2023 | LIORAT: NN Layer I/O Range Training for Area/Energy-Efficient Low-Bit A/D Conversion System Design in Error-Tolerant Computation-in-MemoryabstractAnalog Computation-in-Memory (CiM) with ReRAM accelerates the MAC operations of neural networks (NNs). A major issue of CiM is the area and power consumption of analog-to-digital converters (ADCs). This work proposes a low-bit A/D conversion system to improve area/energy efficiency. However, the application-level accuracy is degraded due to quantization error and the limited range of low-bit ADC. To determine the optimal ADC range systematically while maintaining application-level accuracy, Layer Input/Output (I/O) Range Training (LIORAT) is proposed. LIORAT simultaneously trains the weights of a NN and the I/O range of each NN layer. Additionally, a digital ReRAM look-up table (LUT) is placed just after the ADC in the proposed A/D conversion system. Digital ReRAM LUT is used for non-MAC operations in the NN, such as batch normalization (BN). The values of the LUT are uniquely determined by the BN parameters and I/O ranges obtained by LIORAT. The application-level accuracy degradation caused by the ADC non-linearity and ReRAM weight errors can be compensated only by retraining BN parameters. Hence, the accuracy is recovered by updating digital L UT with the retrained BN parameters. Weight error compensation by updating digital L UT requires lower write accuracy compared to analog weight rewriting. ResNet-32 trained with the proposed LIORAT achieves 87.1 % inference accuracy on the CIFAR-10 dataset with only 10% LUT area overhead, 4-bit weights, 2-bit DAC, and 4-bit ADC. By updating the L UT, the magnitude of the tolerable error is more than doubled compared to the case without compensation. Ayumu Yamada, Naoko Misawa, Chihiro Matsui, Ken Takeuchi |
ICCAD | 2 |
| 2022 | Domain Specific ReRAM Computation-in-Memory Design Considering Bit Precision and Memory Errors for Simulated AnnealingabstractIn this paper, domain specific ReRAM-based Computation-in-Memory (CiM) design for simulated annealing (SA) is proposed. This paper reveals that the influence of bit precision and memory cell errors of ReRAM CiM on the accuracy for SA depends on the domains of combinatorial optimization problems, such as Max-Cut and Knapsack problems. It is found that Max-Cut problem has smaller circuit structure and is 3-bit higher tolerant of bit precision, but 4% lower bit-error rate (BER) tolerant, compared with Knapsack problem. In this paper, considering the requirements of bit precision and BER from each domain, examples of case studies and design strategy are presented such that ReRAM CiMs are best optimized in terms of reliability and array area of memory cells. Furthermore, the proposed best-optimized ReRAM CiM for Max-Cut problem improves the quality of SA by introducing approximate answers and avoiding local minimum. Naoko Misawa, Kenta Taoka, Chihiro Matsui, Ken Takeuchi |
ISCAS | 1 |
| 2022 | Edge Computation-in-Memory for In-situ Class-incremental Learning with Knowledge DistillationabstractThis paper proposes a Computation-in-Memory (CiM) architecture for in-situ class-incremental learning. Due to usage change or environmental change, neural network models implemented in edge devices need to be retrained. Retraining on edge devices improves the latency of the retraining and reduces communication traffic, power consumption, and risk of security and privacy issue. The proposed CiM updates only the final fully connected (fc) layer, not the convolution layers. CiM does not need backpropagation and the number of rewrites to nonvolatile memory is small. The proposed CiM realizes knowledge distillation by cooperation of digital processor and CiM and can be retrained even when the old class data are not available. As a result, the accuracy keeps above 80% on CIFAR-10 when the bit precision of convolution and fc layer are 6 bits and 3 bits, respectively and bit-error rate of convolution and fc layers are less than 0.001% and 1%, respectively. In the proposed CiM, cell program during the retraining concentrate on the final fc layer, which is consistent with the characteristics of proposed class-incremental learning where the fc layer tolerates higher BER of memory cells and low bit precision than the convolution layers. Shinsei Yoshikiyo, Naoko Misawa, Chihiro Matsui, Ken Takeuchi |
ISCAS | 2 |
| 2022 | Antithetic effect of interferon-α on cell-free and cell-to-cell HIV-1 infectionabstractIn HIV-1-infected individuals, transmitted/founder (TF) virus contributes to establish new infection and expands during the acute phase of infection, while chronic control (CC) virus emerges during the chronic phase of infection. TF viruses are more resistant to interferon-alpha (IFN-α)-mediated antiviral effects than CC virus, however, its virological relevance in infected individuals remains unclear. Here we perform an experimental-mathematical investigation and reveal that IFN-α strongly inhibits cell-to-cell infection by CC virus but only weakly affects that by TF virus. Surprisingly, IFN-α enhances cell-free infection of HIV-1, particularly that of CC virus, in a virus-cell density-dependent manner. We further demonstrate that LY6E, an IFN-stimulated gene, can contribute to the density-dependent enhancement of cell-free HIV-1 infection. Altogether, our findings suggest that the major difference between TF and CC viruses can be explained by their resistance to IFN-α-mediated inhibition of cell-to-cell infection and their sensitivity to IFN-α-mediated enhancement of cell-free infection. Ryuichi Kumata, Shoya Iwanami, Katrina B. Mar, Yusuke Kakizoe, Naoko Misawa, Shinji Nakaoka, Yoshio Koyanagi, Alan S. Perelson, John W. Schoggins, Shingo Iwami, Kei Sato |
PLoS Comput. Biol. | 5 |