John Blanks

dblp:328/5933 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 1987
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Applied, interdisciplinary, general and emerging computing · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Electronic design automation · 75% Integrated circuit design · 25%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation › physical design
gate array design
0.011987
Automatic placement and routing techniques for gate array and standard cell designs · Proc. IEEE 1987
Electronic design automation
physical design
0.011987
Automatic placement and routing techniques for gate array and standard cell designs · Proc. IEEE 1987
Electronic design automation › physical design
placement and routing
0.011987
Automatic placement and routing techniques for gate array and standard cell designs · Proc. IEEE 1987
Integrated circuit design › ASIC design
standard cell design
0.011987
Automatic placement and routing techniques for gate array and standard cell designs · Proc. IEEE 1987

Methods — techniques the papers use, named apart from their topics

routing algorithm · 0.0convex quadratic optimization · 0.0
YearPublicationVenuePosition
1987 Automatic placement and routing techniques for gate array and standard cell designs
abstract
Physical layout techniques of automatic placement and interconnection routing are discussed. The placement section begins with a description of alternate technologies (gate array versus standard cell), followed by a discussion of various techniques and metrics used in placement algorithms. Two standard cell placement algorithms are briefly discussed. Next, a model of placement difficulty is developed in order to gain some insight into modern layout problems. The mathematical property of convexity and its importance to the placement problem is developed. The use of a convex quadratic objective function as a practical layout metric is discussed in some depth. Conventional routing sequences and algorithms are described in moderate detail. Some newer techniques are also discussed. Finally, special case routing problems and approaches are briefly described.
H. Nelson Brady, John Blanks
Proc. IEEE2