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Isai Roman-Ballesteros

dblp:329/0287 · DBLP profile ↗
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1ranked-venue papers
0as first author
1since 2021 · last 2022
0000-0002-4173-4858ORCID · reported

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Energy-efficient computing · 40% Hardware reliability and fault tolerance · 40% Hardware accelerators and domain-specific architectures · 20%

Topics — the 5 heaviest of 5, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Hardware reliability and fault tolerance
aging
0.612022
Thermal-Aware Design for Approximate DNN Accelerators · IEEE Trans. Computers 2022
Hardware accelerators and domain-specific architectures › machine learning accelerator
neural network accelerator
0.612022
Thermal-Aware Design for Approximate DNN Accelerators · IEEE Trans. Computers 2022
Energy-efficient computing › thermal management
thermal-aware design
0.612022
Thermal-Aware Design for Approximate DNN Accelerators · IEEE Trans. Computers 2022
Energy-efficient computing
thermal management
0.612022
Thermal-Aware Design for Approximate DNN Accelerators · IEEE Trans. Computers 2022
Hardware reliability and fault tolerance › aging
transistor aging
0.612022
Thermal-Aware Design for Approximate DNN Accelerators · IEEE Trans. Computers 2022

Methods — techniques the papers use, named apart from their topics

multi-physics heat simulation · 0.6approximate multiplier · 0.6
YearPublicationVenuePosition
2022 Thermal-Aware Design for Approximate DNN Accelerators
abstract
Recent breakthroughs in Neural Networks (NNs) have made DNN accelerators ubiquitous and led to an ever-increasing quest on adopting them from Cloud to edge computing. However, state-of-the-art DNN accelerators pack immense computational power in a relatively confined area, inducing significant on-chip power densities that lead to intolerable thermal bottlenecks. Existing state of the art focuses on using approximate multipliers only to trade-off efficiency with inference accuracy. In this work, we present a thermal-aware approximate DNN accelerator design in which we additionally trade-off approximation with temperature effects towards designing DNN accelerators that satisfy tight temperature constraints. Using commercial multi-physics tool flows for heat simulations, we demonstrate how our thermal-aware approximate design reduces the temperature from 139$^{\circ }$C, in an accurate circuit, down to 79$^{\circ }$C. This enables DNN accelerators to fulfill tight thermal constraints, while still maximizing the performance and reducing the energy by around 75% with a negligible accuracy loss of merely 0.44% on average for a wide range of NN models. Furthermore, using physics-based transistor aging models, we demonstrate how reductions in voltage and temperature obtained by our approximate design considerably improve the circuit’s reliability. Our approximate design exhibits around 40% less aging-induced degradation compared to the baseline design.
Georgios Zervakis 0001, Iraklis Anagnostopoulos, Sami Salamin, Ourania Spantidi, Isai Roman-Ballesteros, Jörg Henkel, Hussam Amrouch
IEEE Trans. Computers5