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Li Liu 0038

dblp:33/4528-38 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 2008
—ORCID · unresolved

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1Software engineering, systems software and programming languages · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Performance modeling and evaluation · 100%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Performance modeling and evaluation › workload characterization › memory characterization
memory access characterization
0.112008
HMTT: a platform independent full-system memory trace monitoring system · SIGMETRICS 2008
Performance modeling and evaluation › trace analysis
memory trace analysis
0.112008
HMTT: a platform independent full-system memory trace monitoring system · SIGMETRICS 2008
Performance modeling and evaluation
workload characterization
0.112008
HMTT: a platform independent full-system memory trace monitoring system · SIGMETRICS 2008

Methods — techniques the papers use, named apart from their topics

hardware monitoring · 0.1DIMM snooping · 0.1
YearPublicationVenuePosition
2008 HMTT: a platform independent full-system memory trace monitoring system
abstract
Memory trace analysis is an important technology for architecture research, system software (i.e., OS, compiler) optimization, and application performance improvements. Many approaches have been used to track memory trace, such as simulation, binary instrumentation and hardware snooping. However, they usually have limitations of time, accuracy and capacity.In this paper we propose a platform independent memory trace monitoring system, which is able to track virtual memory reference trace of full systems (including OS, VMMs, libraries, and applications). The system adopts a DIMM-snooping mechanism that uses hardware boards plugged in DIMM slots to snoop. There are several advantages in this approach, such as fast, complete, undistorted, and portable. Three key techniques are proposed to address the system design challenges with this mechanism: (1) To keep up with memory speeds, the DDR protocol state machine is simplified, and large FIFOs are added between the state machine and the trace transmitting logic to handle burst memory accesses; (2) To reconstruct physical-tovirtual mapping and distinguish one process' address space from others, an OS kernel module, which collects page table information, and a synchronization mechanism, which synchronizes the page table information with the memory race, are developed; (3) To dump massive trace data, we employ a straightforward method to compress the trace and use Gigabit Ethernet and RAID to send and receive the compressed trace.We present our implementation of an initial monitoring system, named HMTT (Hyper Memory Trace Tracker). Using HMTT, we have observed that burst bandwidth utilization is much larger than average bandwidth utilization, by up to 5X in desktop applications. We have also confirmed that the stream memory accesses of many applications contribute even more than 40% of L2 Cache misses and OS virtual memory management may decrease stream accesses in view of memory controller (or L2 Cache), by up to 30.2%. Moreover, we have evaluated OS impact on memory performance in real systems. The evaluations and case studies show the feasibility and effectiveness of our proposed monitoring mechanism and techniques.
Yungang Bao, Mingyu Chen 0001, Yuan Ruan, Li Liu 0038, Jianping Fan 0002, Qingbo Yuan
SIGMETRICS4