Peng Gu 0004

dblp:33/5231-4 · DBLP profile ↗
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5ranked-venue papers
1as first author
4since 2021 · last 2026
0000-0003-0753-9183ORCID · verified

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 5 · 1 first-author · 4 since 2021
YearPublicationVenuePosition
2026 A 24.25-29.5-GHz CMOS Upconversion Transmitter With Built-In Automatic LO Feedthrough and I/Q Imbalance Calibration for 5G New Radio
Hengzhi Wan, Pengfei Diao, Chenyu Xu, Peng Gu 0004, Enqi Zheng, Dixian Zhao
IEEE Trans. Circuits Syst. I Regul. Pap.4
2021 Analysis and Design of a CMOS Bidirectional Passive Vector-Modulated Phase Shifter
abstract
This paper presents a passive vector-modulated phase shifter (VMPS). The passive X-type attenuator consisting of digitally controlled transistor-array units is employed to perform the phase-invertible gain tuning, and thus enables phase shift in all four quadrants. The Wilkinson-like power combiner is utilized to sum up the quadrature signals and avoid impedance mismatches. Analysis proves that the proposed passive VMPS can provide consistent phase-shift performance for bidirectional operation. The proof-of-concept VMPS is implemented in 40-nm CMOS technology and occupies a core chip area of 0.15 mm2. Measured results prove that it can provide consistent bidirectional 6-bit phase-shift operation, with accurate phase tuning (i.e., RMS phase error <; 24°) and low gain error (i.e., ±0.6 dB) over the whole 70-90 GHz band.
Peng Gu 0004, Dixian Zhao, Xiaohu You 0001
IEEE Trans. Circuits Syst. I Regul. Pap.1
2021 Millimeter-Wave Integrated Phased Arrays
abstract
Large-scale millimeter-wave (mm-Wave) integrated phased array is the key technology to enable broadband 5G and satellite communications. This paper details the design considerations, challenges and trade-offs of mm-Wave integrated phased arrays based on bulk CMOS and multi-layer hybrid PCB technologies. Both technologies attain high yield and low cost for mass production. Important beamforming building blocks are addressed and compared in detail. Demonstrators of integrated phased arrays are presented from circuit to board levels. The 1024- and 4096-element integrated phased arrays achieve the EIRP of 72.5 and 84.0 dBm respectively. Finally, relevant phased-array transceivers and antennas from the recent literature are discussed.
Dixian Zhao, Peng Gu 0004, Jiecheng Zhong, Na Peng, Mengru Yang, Yongran Yi, Jiajun Zhang 0002, Pingyang He, Zhi Chen 0002, Xiaohu You 0001
IEEE Trans. Circuits Syst. I Regul. Pap.2
2021 Corrections to "Millimeter-Wave Integrated Phased Arrays" [early access, Jul 12, 21 doi: 10.1109/TCSI.2021.3093093]
Dixian Zhao, Peng Gu 0004, Jiecheng Zhong, Na Peng, Mengru Yang, Yongran Yi, Jiajun Zhang 0002, Pingyang He, Xiaohu You 0001
IEEE Trans. Circuits Syst. I Regul. Pap.2
2019 5G Millimeter-Wave Phased-Array Transceiver: System Considerations and Circuit Implementations
abstract
In this paper, system considerations and circuit implementations for 5G millimeter-wave (mm-Wave) phased-array transceiver are presented. High data-rate and medium-range communications pose challenges for the design of phased-array transceiver circuits operating at the mm-Wave band. A possible solution is that the core chip for digital, mixed-signal and RF processing blocks are integrated in advanced CMOS, while power amplifier (PA), low-noise amplifier (LNA) and RF switch are implemented in III-V technologies (i.e., GaAs or GaN). To show the feasibility of such system architecture, key building blocks include high power amplifier (HPA), broadband LNA, amplitude-invariant phase shifter and phase-invariant variable gain amplifier (VGA) are reviewed. The proposed techniques make the mm-Wave phased-array transceiver systems suitable for 5G fixed wireless access (FWA) applications.
Dixian Zhao, Jiajun Zhang 0002, Yongran Yi, Peng Gu 0004
ISCAS4