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Brian van Straalen

dblp:33/6973 · DBLP profile ↗
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8ranked-venue papers
2as first author
0since 2021 · last 2017
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 8 · 2 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
High-performance computing · 65% Processor architecture and microarchitecture · 22% Memory systems · 6%

Topics — the 4 heaviest of 6, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
High-performance computing › numerical linear algebra › linear solver
iterative linear solvers
0.112012
Optimization of geometric multigrid for emerging multi- and manycore processors · SC 2012
High-performance computing › performance optimization
many-core processor optimization
0.112012
Optimization of geometric multigrid for emerging multi- and manycore processors · SC 2012
High-performance computing › numerical linear algebra › linear solver › iterative linear solvers
multigrid method
0.112012
Optimization of geometric multigrid for emerging multi- and manycore processors · SC 2012
Processor architecture and microarchitecture
SIMD
0.112012
Optimization of geometric multigrid for emerging multi- and manycore processors · SC 2012

Methods — techniques the papers use, named apart from their topics

threaded wavefront · 0.1operator fusion · 0.1dynamic threading · 0.1communication aggregation · 0.1
YearPublicationVenuePosition
2017 Compiler-based code generation and autotuning for geometric multigrid on GPU-accelerated supercomputers
Protonu Basu, Samuel Williams 0001, Brian van Straalen, Leonid Oliker, Phillip Colella, Mary W. Hall
Parallel Comput.3
2015 Compiler-Directed Transformation for Higher-Order Stencils
abstract
As the cost of data movement increasingly dominates performance, developers of finite-volume and finite-difference solutions for partial differential equations (PDEs) are exploring novel higher-order stencils that increase numerical accuracy and computational intensity. This paper describes a new compiler reordering transformation applied to stencil operators that performs partial sums in buffers, and reuses the partial sums in computing multiple results. This optimization has multiple effect son improving stencil performance that are particularly important to higher-order stencils: exploits data reuse, reduces floating-point operations, and exposes efficient SIMD parallelism to backend compilers. We study the benefit of this optimization in the context of Geometric Multigrid (GMG), a widely used method to solve PDEs, using four different Jacobi smoothers built from 7-, 13-, 27- and 125-point stencils. We quantify performance, speedup, and numerical accuracy, and use the Roofline model to qualify our results. Ultimately, we obtain over 4× speedup on the smoothers themselves and up to a 3× speedup on the multigrid solver. Finally, we demonstrate that high-order multigrid solvers have the potential of reducing total data movement and energy by several orders of magnitude.
Protonu Basu, Mary W. Hall, Samuel Williams 0001, Brian van Straalen, Leonid Oliker, Phillip Colella
IPDPS4
2014 s-Step Krylov Subspace Methods as Bottom Solvers for Geometric Multigrid
abstract
Geometric multigrid solvers within adaptive mesh refinement (AMR) applications often reach a point where further coarsening of the grid becomes impractical as individual sub domain sizes approach unity. At this point the most common solution is to use a bottom solver, such as BiCGStab, to reduce the residual by a fixed factor at the coarsest level. Each iteration of BiCGStab requires multiple global reductions (MPI collectives). As the number of BiCGStab iterations required for convergence grows with problem size, and the time for each collective operation increases with machine scale, bottom solves in large-scale applications can constitute a significant fraction of the overall multigrid solve time. In this paper, we implement, evaluate, and optimize a communication-avoiding s-step formulation of BiCGStab (CABiCGStab for short) as a high-performance, distributed-memory bottom solver for geometric multigrid solvers. This is the first time s-step Krylov subspace methods have been leveraged to improve multigrid bottom solver performance. We use a synthetic benchmark for detailed analysis and integrate the best implementation into BoxLib in order to evaluate the benefit of a s-step Krylov subspace method on the multigrid solves found in the applications LMC and Nyx on up to 32,768 cores on the Cray XE6 at NERSC. Overall, we see bottom solver improvements of up to 4.2x on synthetic problems and up to 2.7x in real applications. This results in as much as a 1.5x improvement in solver performance in real applications.
Samuel Williams 0001, Michael Lijewski, Ann S. Almgren, Brian van Straalen, Erin Carson, Nicholas Knight, James Demmel
IPDPS4
2014 A survey of high level frameworks in block-structured adaptive mesh refinement packages
Anshu Dubey, Ann S. Almgren, John B. Bell, Martin Berzins, Steven R. Brandt, Greg Bryan, Phillip Colella, Daniel T. Graves, Michael Lijewski, Frank Löffler 0001, Brian W. O'Shea, Erik Schnetter, Brian van Straalen, Klaus Weide
J. Parallel Distributed Comput.13
2013 Compiler generation and autotuning of communication-avoiding operators for geometric multigrid
abstract
This paper describes a compiler approach to introducing communication-avoiding optimizations in geometric multigrid (GMG), one of the most popular methods for solving partial differential equations. Communication-avoiding optimizations reduce vertical communication through the memory hierarchy and horizontal communication across processes or threads, usually at the expense of introducing redundant computation. We focus on applying these optimizations to the smooth operator, which successively reduces the error and accounts for the largest fraction of the GMG execution time. Our compiler technology applies both novel and known transformations to derive an implementation comparable to manually-tuned code. To make the approach portable, an underlying autotuning system explores the tradeoff between reduced communication and increased computation, as well as tradeoffs in threading schemes, to automatically identify the best implementation for a particular architecture and at each computation phase. Results show that we are able to quadruple the performance of the smooth operation on the finest grids while attaining performance within 94% of manually-tuned code. Overall we improve the overall multigrid solve time by 2.5× without sacrificing programer productivity.
Protonu Basu, Anand Venkat, Mary W. Hall, Samuel Williams 0001, Brian van Straalen, Leonid Oliker
HiPC5
2012 Optimization of geometric multigrid for emerging multi- and manycore processors
abstract
Multigrid methods are widely used to accelerate the convergence of iterative solvers for linear systems used in a number of different application areas. In this paper, we explore optimization techniques for geometric multigrid on existing and emerging multicore systems including the Opteron-based Cray XE6, Intel® Xeon® E5-2670 and X5550 processor-based Infiniband clusters, as well as the new Intel® Xeon Phi coprocessor (Knights Corner). Our work examines a variety of novel techniques including communication-aggregation, threaded wavefront-based DRAM communication-avoiding, dynamic threading decisions, SIMDization, and fusion of operators. We quantify performance through each phase of the V-cycle for both single-node and distributed-memory experiments and provide detailed analysis for each class of optimization. Results show our optimizations yield significant speedups across a variety of subdomain sizes while simultaneously demonstrating the potential of multi- and manycore processors to dramatically accelerate single-node performance. However, our analysis also indicates that improvements in networks and communication will be essential to reap the potential of manycore processors in large-scale multigrid calculations.
Samuel Williams 0001, Dhiraj D. Kalamkar, Amik Singh, Anand M. Deshpande, Brian van Straalen, Mikhail Smelyanskiy, Ann S. Almgren, Pradeep Dubey, John Shalf, Leonid Oliker
SC5
2011 Petascale Block-Structured AMR Applications without Distributed Meta-data
Brian van Straalen, Phillip Colella, Daniel T. Graves, Noel Keen
Euro-Par (2)1
2009 Scalability challenges for massively parallel AMR applications
abstract
PDE solvers using Adaptive Mesh Refinement on block structured grids are some of the most challenging applications to adapt to massively parallel computing environments. We describe optimizations to the Chombo AMR framework that enable it to scale efficiently to thousands of processors on the Cray XT4. The optimization process also uncovered OS-related performance variations that were not explained by conventional OS interference benchmarks. Ultimately the variability was traced back to complex interactions between the application, system software, and the memory hierarchy. Once identified, software modifications to control the variability improved performance by 20% and decreased the variation in computation time across processors by a factor of 3. These newly identified sources of variation will impact many applications and suggest new benchmarks for OS-services be developed.
Brian van Straalen, John Shalf, Terry J. Ligocki, Noel Keen, Woo-Sun Yang
IPDPS1