3D HEVC is one of the extensions of HEVC (High Efficiency Video Coding), which is the latest video coding standard developed by the Joint Collaborative Team on Video Coding (JCT-VC). The inherent high computing complexity of 3D HEVC handicaps its usage in practical applications. HEVC replaces the macroblock (MB) of H.264 with the largest coding unit (LCU), in which coding units (CUs) of sizes 64 × 64, 32 × 32, 16 × 16, or 8 × 8 pixels are used to build a coding tree unit (CTU). HEVC encoder will traverse the coding modes from the root (the coding level is 0) to the leaves (the coding level is 3) of the CTU. As a result, how to accelerate the encoding process of 3D HEVC with negligible loss of coding efficiency is a hot research topic in the field of video coding. Figure 1 shows the coding level distributions of I04 and I14, where Ikj represents the j-th frame in the k-th GOP. The POC's (picture order counts) of the two frame are P(I04) = 4 and P(I14) = 12 when GOP size is 8. From Figure 1 we observed that, in B-slices, the distributions of "optimal coding level = zero" for adjacent GOP's are almost the same. We found that the required coding level will be similar when the two CUs have similar depth values. We utilize this correlation to limit the required coding level visiting of a given CU which accelerates the encoding process. In this paper, a fast mode decision algorithm for 3D HEVC, based on the depth information related coding mode similarity, is proposed. According to the experimental results, the proposed algorithm can reduce up to 72% executing time of the overall encoding process, while the loss in coding efficiency is negligible.

Summary form only given. Distributed video coding (DVC) has been intensively studied in recent years. This new coding paradigm substantially differs from conventional prediction-based video codecs such as MPEG and H.26x, which are characterized by a complex encoder and simple decoder. The conventional DVC codec, e.g., DISCOVER codec, uses advanced frame interpolation techniques to create SI based on adjacent decoded reference frames. The quality of SI is a well-recognized factor in the RD performance of WZ video coding. A high SI quality implies a high correlation between the created SI and the original WZ frame, which then decreases the rate required to achieve a given decoded quality. Clearly, the performance of an SI creation process based on adjacent previously decoded frames is limited by the quality of the past and the future reference frames as well as the distance and motion behavior between them. The correlation between high-motion frames is low and vice versa. That is, SI quality in the conventional codecs depends on the temporal correlation of key frames, which affects the bitrate and PSNR of the compression process. In this work, a novel DVC architecture for dealing with the cases of high-motion and large GOP-size sequences is proposed to better the rate-distortion (RD) performance. For high-motion video sequences, the proposed architecture generates SI by using subsampled spatial information instead of interpolated temporal information. the proposed approach separates the video sequence into subsampled key frames and corresponding WZ frames, which changes the creation of SI. That is, all successive frames on the encoder side are downsized to sub-frames, which are then compressed by an H.264/AVC intra encoder. Experimental results reveal that the subsampling input based DVC codec can gain up to 1.47 dB in the RD measures and maintains the most important characteristic of the DVC codec, the encoder is lightweight, as compared with the conventional WZ codec, respectively. The novel DVC architecture evaluated in this study exploits spatial relations to create SI. The experimental results confirm that the RD performance of the proposed approach is superior to that of the conventional one for high-motion and/or large GOP-size sequences. The quality of spatial interpolation based SI is higher than that of the temporal interpolation one, which leads to a high-PSNR reconstructed WZ frame. The subsampled key frames are also decoded by LDPCA decoder to recover the information lost when H.264/AVC intra coding is used to increase PSNR gain. Since many spatial domain interpolation and super resolution schemes have been proposed for use in the fields of image processing and computer vision, the performance of the proposed DVC codec can be further enhanced by using better schemes to generate even better SI.

On the basis of a non-local means denosing process, a novel progressive side information refinement framework for a transform domain Wyner-Ziv video codec is proposed, where the side information is progressively improved, as the decoding proceeds, by exploring both temporal-spatial similarities and already decoded DCT bands. Simulation results show up to 2.5dB in RD performance gain against that of the same codec without including the proposed side information refinement framework for sequences with high motion and/or large group-of-picture sizes. Moreover, the proposed framework adds no significant complexity to the decoder, and even results in a decoding speed-up due to the less required error correcting iterations, for most of the test sequences.

Despite gaining certain improvements in coding performances recently, the effectiveness (in terms of rate-distortion) and the efficiency (in terms of decoding speed) of the existing Wyner-Ziv (WZ) codecs are far behind that of the state-of-the-art prediction-based video coding standards. In other words, for decades, the poor RD performance and the high coding delay hinder WZ codecs from being applied to practical applications. To respond to the above challenges, an effective and efficient WZ video coding architecture, referred to herein as "Improved Side Information and Parallelized Design" (ISIPaD) for distributed video coding (DVC), is proposed and realized to enhance the RD performance and the execution speed at the same time. This work details the proposed coding scheme and shows its RD superiority over the related works. With much enhanced performances in both rate distortion (up to 3.6dB in RD measures) and execution time (60.97 times faster in speed), as compared with those of the state-of-the-art WZ video codecs, our work demonstrates a great potential for DVC being applied to real applications in the near future.

Summary form only given. In this paper, Wyner-Ziv (WZ) video coding is a particular case of distributed video coding (DVC). Although some works, with improved performance, have been made in recent years, the coding efficiency of state-of-the-art WZ codec is still far from that of the state-of-the-art prediction-based codec, especially for high and complex motion contents. Moreover, most reported WZ codecs have a high time delay in decoder, which hinders its practical application in real-time systems. The performance of the SI creation process based on adjacent previously decoded frames is limited by the quality of the past and the future reference frames as well as the distance and motion behavior between them. In this work, by combining coding tools developed in recent literatures on transform domain WZ coding with some newly developed modules on both encoding and decoding sides, an efficient and practical WZ video coding architecture, dubbed as Distributed video coding with PArallelized design for Concurrent computing (DISPAC), is proposed to better the rate-distortion (RD) performance. Another unique feature of DISPAC, lies in the parallelizability of the modules used by its WZ decoder which increased the decoding speed largely. Experimental results conducted on a concurrent computing environment (consisting of multi-core CPU and GPU processors) reveal that DISPAC codec can gain up to 2.8 dB in the RD measures and 14.35 times faster in the decoding speed as compared with the-state-of-art WZ video codec, respectively. By shifting the computational complexity from the encoder to the decoder and integrating with appropriate trascoding techniques, DVC has been expected to provide a video codec solution for Cloud computing mobile devices (such as mobile phones).

In this work, by combining coding tools developed in recent literatures on transform domain WZ video coding with some newly developed modules on both encoding and decoding sides, an efficient and practical WZ video coding architecture, dubbed as DIStributed video coding with PArallelized design for Cloud computing (DISPAC), is proposed to better the corresponding rate-distortion (RD) performance. Another unique feature of DISPAC, lies in the parallelizability of the modules used by its WZ decoder which increased the decoding speed largely. Experimental results conducted on an emulated Could computing environment reveal that DISPAC codec can gain up to 3.6 dB in the RD measures and 60.97 times faster in the decoding speed as compared with the-state-of-art WZ video codec, respectively

Wyner-Ziv (WZ) video coding -- a particular case of distributed video coding (DVC), is well known for its low-complexity encoding and high-complexity decoding characteristics. Although some works have been made in recent years, especially for improving the coding efficiency, most reported WZ codecs have high time delay in the decoder, which hinders its practical values for applications with critical timing constraint. In this paper, a fully parallelized sum-product algorithm (SPA) for low density parity check accumulate (LDPCA) codes is proposed and realized through Compute Unified Device Architecture (CUDA) based on General-Purpose Graphics Processing Unit (GPGPU). Simulation results show that, through our work, QCIF (surveillance) videos can be decoded in real-time with extremely high quality and without rate-distortion (RD) performance loss.

This paper presents a novel distributed video coding (DVC) scheme using compressive sensing (CS) that achieves low-complexity for encoding and efficient signal sensing. Most CS recovery algorithms rely only on signal sparsity. Yet, under DVC architecture, additional statistical characterization of the signal is available, which offers the potential for more precise CS recovery. First, a set of random measurements are acquired and transmitted to the decoder. The decoder then exploits the statistical characterization of the signal and generates the side information (SI). Finally, utilizing the SI, a Bayesian inference using belief propagation (BP) decoding is performed for signal recovery. The proposed CS-DVC system offers a more direct way of signal acquisition and the potential for more precise estimation of the signal from random measurements. Experimental results indicate that SI can improve the signal reconstruction quality in comparison with a CS recovery algorithm that relies only on the sparsity.

Block mode selection is one new way to improve the performance of distributed video coding (DVC). Since there are many factors influencing the correctness of the block mode selection, the decision of block mode is not an easy work. In this paper, a low complexity block mode selection model is proposed to select the block modes more correctly in the WZ (Wyner-Ziv) frame. The proposed block mode selection modules can increase the RD performance up to 2.8 dB as compared with the traditional DVC codecs; moreover, the subjective quality can also be improved by using the proposed deblocking filter when the objective quality is kept the same.

Distributed video coding (DVC) is a new coding paradigm targeting applications with the need for low-complexity encoding at the cost of a higher decoding complexity. In the DVC architecture based on a feedback channel, the high decoding complexity is mainly due to the request-decode operation with repetitively fixed step size (induced by Slepian-Wolf decoding). In this paper, a parallel message-passing decoding algorithm for low density parity check (LDPC) syndrome is applied through Compute Unified Device Architecture (CUDA) based on General-Purpose Graphics Processing Unit (GPGPU). Furthermore, we propose an approach to reduce the number of requests dubbed as Ladder Request Step Size (LRSS) which leads to more speedup gain. Experimental results show that, through our work, significant speedup in decoding time is achieved with negligible loss in rate-distortion (RD) performance.

We propose a unidirectional communication system capable of pushing information from audio speakers to nearby audience via acoustic channels. Though constrained by short transmission distances and low data throughput of sound waves, information push services based on acoustic channels can be regarded as a cost-free message delivery scheme since music playback systems and handheld devices equipped with recording capabilities have become ubiquitous in our life. Furthermore, the proposed approach can provide better non-intrusiveness and more convenient user access than other auxiliary information delivery approaches like 2-D barcodes or watermarking schemes based on visual contents. To the best of our knowledge, our system is the first one that can effectively push information to receivers at feasible transmission throughput/robustness/distance within common noisy environments. Various interesting applications and new business models can be facilitated with the proposed scheme.

The scalable video coding (SVC), an extension of H.264/MPEG4-AVC (H.264), was standardized in 2007 by Joint Video Team (JVT). SVC provides spatial, temporal and SNR scalabilities. To achieve these scalabilities, SVC uses additional coding tools and coding modes based on H.264. The coding tools used by SVC and the variety coding modes decision make the corresponding coding complexity become extremely high, so real-time realization of SVC is nearly impossible by using software and single-core CPU only. One possible solution to generate SVC streams in real-time is to parallelize the whole encoding process. Currently, multi-core CPU and GPU are two popular kinds of parallel processing architectures. Not much research has been devoted to realize the parallel SVC encoders based on the co-work of these two architectures. In this paper, a scalable computation model for spatial SVC using multi-core CPU and GPGPU through NVIDIA CUDA is proposed. On the basis of the proposed computational model, a solution to solve the challenging data transition problem (will be detailed later) of this CPU-GPU co-work architecture is then provided. Simulation results show that, through our work, significant speed up gain in spatial SVC encoding can be achieved.