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Benjamin Arazi

dblp:33/850 · DBLP profile ↗
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25ranked-venue papers
19as first author
0since 2021 · last 2010
0000-0002-9501-2092ORCID · reported

Domains — the database's venue-derived domains; a paper can count in several

Computer networks · 7 · 6 first-authorTheory of computation · 5 · 5 first-authorApplied, interdisciplinary, general and emerging computing · 5 · 2 first-authorSystems, architecture and hardware · 4 · 3 first-authorHuman-computer interaction and ubiquitous computing · 2 · 2 first-authorSecurity and privacy · 1 · 1 first-authorSoftware engineering, systems software and programming languages · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Network and information security
6 papers
Cryptographic primitives and cryptanalysis · 58% Cryptographic protocols and secure computation · 42%
Theoretical computer science
7 papers
Algorithms and data structures · 56% Coding theory · 29% Combinatorics and discrete mathematics · 10%
Software engineering, system software, and programming languages
2 papers
Programming languages and type systems · 79% Concurrent programming · 21%
Computer networks
4 papers
Internet of things and sensor networks · 91% Physical-layer communications · 9%
Computer architecture, parallel and distributed computing, and storage systems
4 papers
Integrated circuit design · 60% Electronic design automation · 24% Emerging computing paradigms · 12%

Topics — the 30 heaviest of 39, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Cryptographic primitives and cryptanalysis › message authentication codes
hash-based message authentication
0.112009
Message Authentication in Computationally Constrained Environments · IEEE Trans. Mob. Comput. 2009
Cryptographic primitives and cryptanalysis
message authentication codes
0.112009
Message Authentication in Computationally Constrained Environments · IEEE Trans. Mob. Comput. 2009
Cryptographic protocols and secure computation
distributed certification
0.112008
Computationally Efficient Distributed and Delegated Certification · IEEE Trans. Parallel Distributed Syst. 2008
Cryptographic protocols and secure computation › key management
public key infrastructure
0.112008
Computationally Efficient Distributed and Delegated Certification · IEEE Trans. Parallel Distributed Syst. 2008
Programming languages and type systems
logic programming
0.021991
Using Flat Concurrent Prolog in System Modeling · IEEE Trans. Software Eng. 1991
Concurrent Logic Programming as a Hardware Description Tool · IEEE Trans. Computers 1990
Algorithms and data structures › search algorithms
binary search
0.021992
A Circular Binary Search · IEEE Trans. Computers 1992
A Binary Search with a Parallel Recovery of the Bits · SIAM J. Comput. 1986
Cryptographic primitives and cryptanalysis › number theory
modular arithmetic
0.011993
Double-Precision Modular Multiplication Based on a Single-Precision Modular Multiplier and a Standard CPU · IEEE J. Sel. Areas Commun. 1993
Cryptographic primitives and cryptanalysis › public-key cryptography
modular multiplication
0.011993
Double-Precision Modular Multiplication Based on a Single-Precision Modular Multiplier and a Standard CPU · IEEE J. Sel. Areas Commun. 1993
Cryptographic primitives and cryptanalysis
public-key cryptography
0.011993
Architectures for Exponentiation Over GF(2^n) Adopted for Smartcard Application · IEEE Trans. Computers 1993
Integrated circuit design › digital circuit design
arithmetic circuit design
0.011993
Architectures for Exponentiation Over GF(2^n) Adopted for Smartcard Application · IEEE Trans. Computers 1993
Programming languages and type systems › logic programming › concurrent logic programming
concurrent prolog
0.011991
Using Flat Concurrent Prolog in System Modeling · IEEE Trans. Software Eng. 1991
Concurrent programming › concurrency models
petri nets
0.011991
Using Flat Concurrent Prolog in System Modeling · IEEE Trans. Software Eng. 1991
Programming languages and type systems › logic programming
concurrent logic programming
0.011990
Concurrent Logic Programming as a Hardware Description Tool · IEEE Trans. Computers 1990
Electronic design automation
hardware description language
0.011990
Concurrent Logic Programming as a Hardware Description Tool · IEEE Trans. Computers 1990
Emerging computing paradigms › optical computing
optical adder
0.011985
An electrooptical adder · Proc. IEEE 1985
Integrated circuit design › VLSI design
custom integrated circuit
0.011993
Double-Precision Modular Multiplication Based on a Single-Precision Modular Multiplier and a Standard CPU · IEEE J. Sel. Areas Commun. 1993
Integrated circuit design › digital circuit design › arithmetic circuit design
modular multiplier
0.011993
Double-Precision Modular Multiplication Based on a Single-Precision Modular Multiplier and a Standard CPU · IEEE J. Sel. Areas Commun. 1993
Coding theory › error-correcting codes › combinatorial coding theory
gray codes
0.011984
An Approach for Generating Different Types of Gray Codes · Inf. Control. 1984
Combinatorics and discrete mathematics
combinatorics on words
0.011981
On the Synthesis of de-Bruijn Sequences · Inf. Control. 1981
Coding theory › sequences
de bruijn sequences
0.011981
On the Synthesis of de-Bruijn Sequences · Inf. Control. 1981
Automated reasoning and model checking
synthesis
0.011981
On the Synthesis of de-Bruijn Sequences · Inf. Control. 1981
Cryptographic primitives and cryptanalysis › public-key cryptography
knapsack cryptosystem
0.011980
A trapdoor multiple mapping (Corresp.) · IEEE Trans. Inf. Theory 1980
Cryptographic primitives and cryptanalysis › public-key cryptography
public-key encryption
0.011980
A trapdoor multiple mapping (Corresp.) · IEEE Trans. Inf. Theory 1980
Coding theory
error-correcting codes
0.021978
Improving the Throughput of an ARQ Stop and Wait Scheme for Burst Noise Channels · IEEE Trans. Commun. 1976
The Optimal Burst-Error Correction Capability of the Codes Generated by f(X) = (X^p+1)(X^q+1)/(X+1) · Inf. Control. 1978
Coding theory › error-correcting codes
burst error correction
0.011978
The Optimal Burst-Error Correction Capability of the Codes Generated by f(X) = (X^p+1)(X^q+1)/(X+1) · Inf. Control. 1978
Coding theory › error-correcting codes
cyclic codes
0.011978
The Optimal Burst-Error Correction Capability of the Codes Generated by f(X) = (X^p+1)(X^q+1)/(X+1) · Inf. Control. 1978
Cryptographic primitives and cryptanalysis
stream cipher
0.011977
Self Synchronizing Digital Scramblers · IEEE Trans. Commun. 1977
Processor architecture and microarchitecture
arithmetic unit
0.011985
An electrooptical adder · Proc. IEEE 1985
Coding theory › error-correcting codes › hybrid ARQ
automatic repeat request
0.011976
Improving the Throughput of an ARQ Stop and Wait Scheme for Burst Noise Channels · IEEE Trans. Commun. 1976
Combinatorics and discrete mathematics › enumeration
combinatorial generation
0.011984
An Approach for Generating Different Types of Gray Codes · Inf. Control. 1984

Methods — techniques the papers use, named apart from their topics

stream cipher · 0.2petri nets · 0.0meta-programming · 0.0flat concurrent prolog · 0.0parallel bit recovery · 0.0single-burst detecting scheme · 0.0multiple mapping · 0.0knapsack · 0.0error syndrome detection · 0.0zero insertion · 0.0time scaling · 0.0sonogram-like visualization · 0.0run-length limited coding · 0.0pseudorandom sequence generation · 0.0periodic extension · 0.0linear feedback shift register · 0.0fadeogram display · 0.0
YearPublicationVenuePosition
2010 Design of a DNA-based shift register
abstract
DOAJ is a unique and extensive index of diverse open access journals from around the world, driven by a growing community, committed to ensuring quality content is freely available online for everyone.
Christy M. Gearheart, Eric C. Rouchka, Benjamin Arazi
BMC Bioinform.3
2009 Design of a Hierarchical Principal Component Analysis System for Field Intrusion Detection
Aleksey Y. Ashikhmin, James H. Graham, Ahmed H. Desoky, Benjamin Arazi
CAINE4
2009 Message Authentication in Computationally Constrained Environments
abstract
RFID and wireless sensor networks exemplify computationally constrained environments, where the compact nature of the components cannot support complex computations or high communication overhead. On the other hand, such components should support security applications such as message integrity, authentication, and time stamping. The latter are efficiently implemented by hash message authentication codes (HMAC). As clearly stated in the literature, current approved implementations of HMAC require resources that cannot be supported in constrained components. An approach to implement a compact HMAC by the use of stream ciphering is presented in this paper.
Benjamin Arazi
IEEE Trans. Mob. Comput.1
2008 Random number generation for DNA-based security circuitry
Christy M. Bogard, Eric C. Rouchka, Benjamin Arazi
BMC Bioinform.3
2008 Computationally Efficient Distributed and Delegated Certification
abstract
Certification in public key cryptographic applications concerns the involvement of a CA (Certifying Agent) in approving the validity of users' public keys. Distributed certification pertains to the case where several CAs are involved in issuing certificates. This also includes the case of multi-attribute certification, where different CAs approve different user's attributes. In delegated certification, agents transfer certificate issuing authority in hierarchical chain. Distributed, multi-attribute and delegated certification techniques having a low computational complexity are presented in this paper. It is shown how multiplicity aspects of the various applications are mapped into a multiplied exponents mathematical implementation of the form Pii=1mAibimod p, which is essentially equivalent to a single exponentiation for a moderate m. A fundamental feature of the presented procedures pertains to implementing distributed/multi-attribute certification by referring to any desired subset of participating CAs.
Benjamin Arazi
IEEE Trans. Parallel Distributed Syst.1
2006 Communication-Computation Trade-off in Executing ECDSA in a Contactless Smartcard
Benjamin Arazi
Des. Codes Cryptogr.1
1994 On Primality Testing using Purely Divisionless Operations
abstract
Based on its definition, it appears that primality testing should inherently involve a division operation. Even the popular primality testing procedure which involves modular exponentiations has a division essence. Montgomery arithmetic facilitates modular exponentiation without divisions, provided that certain precalculations which involve proper divisions are first performed. In primality testing these precalculations have to be re-done for each number whose candidacy for primality is tested. It is shown in this paper how primality testing can still be based on Montgomery arithmetic, such that no operation, including the precalculation, involves proper divisions. That is, it is shown that a complete primality testing process can be based on divisionless operations only.
Benjamin Arazi
Comput. J.1
1993 Double-Precision Modular Multiplication Based on a Single-Precision Modular Multiplier and a Standard CPU
abstract
The author considers the case where double-precision modular multiplications need to be performed by a device containing a custom IC that provides for a single-precision modular multiplication. The method presented is obviously extended to multiplying (k*n)-bit operands using an n-bit modular multiplier, for the case where k is a power of 2. Whereas multiprecision modular multiplication is simply executed using an available single-precision modular multiplier which provides external division services, the existence of these services is not assumed in the process presented, as the operation carried by the available modular multiplier is not necessarily based on proper division. The process is controlled by a standard CPU which also performs some simple calculations.>
Benjamin Arazi
IEEE J. Sel. Areas Commun.1
1993 Architectures for Exponentiation Over GF(2^n) Adopted for Smartcard Application
abstract
Two exponentiation circuits are proposed. Using the fact that squaring is a linear operation over GF(2/sup n/), a time-space tradeoff in smartcard-based circuitry is presented. It is shown how multiplication is performed by a single shift, based on replacing the public key alpha /sup a/ in GF(2/sup n/) by its minimal polynomial. Other considerations, related to structure regularity and the possible use of dynamic shift registers, are also treated.>
Benjamin Arazi
IEEE Trans. Computers1
1992 A Circular Binary Search
abstract
In a standard binary search, the binary representation of the index of an element in an ordered linear array is recovered serially bit by bit. For an array of N elements, the index of an element is recovered, in principle, by assigning to each element one value out of log/sub 2/ N possibilities. It is shown here that by arranging 2/sup n/-1 elements in a circular array, the bits of the binary representation of the index of an element are all recovered simultaneously based n assigning to each element one value out of two possibilities. The main theoretical result shows that the parity of an integer X is trivially recovered from the parity of the Hamming weight of the binary representation of X, X+1, X+2, and X+3, whereas, on the other hand, the parity of the Hamming weight of the binary representation of an integer is consistent with modular arithmetic considerations.>
Benjamin Arazi
IEEE Trans. Computers1
1991 Using Flat Concurrent Prolog in System Modeling
abstract
The flat concurrent Prolog (FCP) language, which enables the implementation of synchronization through data flow, communication through shared variables, parallelism through the reduction of the AND components in the clause's body, and indeterminacy through guarded commands, is discussed. It is shown that FCP, used in conjunction with Petri net methods, forms a powerful tool in the modeling of parallel systems that involve concurrency. The simulation of systems represented by various types of Petri nets is achieved using the reduction process of FCP. AND parallelism supports free competition among conflicting enabled transitions. A structural analysis of systems is provided using the metaprogramming technique.>
Yoheved Dotan, Benjamin Arazi
IEEE Trans. Software Eng.2
1990 Concurrent Logic Programming as a Hardware Description Tool
abstract
The possibility of developing hardware description languages (HDLs) based on the principles of logic programming is discussed. The specific logic programming language used to demonstrate this possibility is Flat Concurrent Prolog (FCP). It is shown explicitly how FCP naturally satisfies the commonly accepted fundamental requirements of a hardware description language. It is then demonstrated how FCP overcomes known disadvantages of the highly acclaimed VHDL. Some other parallel logic programming languages beside FCP are also presented briefly, and the possibility of using them for hardware description is discussed.>
Yoheved Dotan, Benjamin Arazi
IEEE Trans. Computers2
1989 Intuition, perception, and secure communication
abstract
The possibility of integrating human visual intelligence into the process of encrypting sensitive information by presenting certain visual information to the recipient's eye is discussed. This adds a new dimension to the cryptocomplexity of such a process. Two implementations are based on this principle are described. The first shows how keys used for encryption can be randomly generated by the transmitter, without the necessity of exchanging them with the legitimate recipient. The keys are 'embedded' in a master key and are recovered from it by the intelligence of the legitimate recipient after he or she uses the master key. No human intelligence can be helpful to a user who does not possess the master key. The second implementation concerns the possibility of creating a secret connection between a numerical key and a specific image (e.g. a face). Such a scheme can be used, for example, in validating the identity of the users of credit cards.>
Benjamin Arazi, Its'hak Dinstein, Oded Kafri
IEEE Trans. Syst. Man Cybern.1
1986 A Binary Search with a Parallel Recovery of the Bits
abstract
In this paper we consider the problem of assigning a numerical value of each of N elements which are arranged in a linear array, for the purpose of being able to recover the location of any specified element (with respect to the first element), with this aim being achieved using a small number of possible different assigned values. An obvious solution is using a binary search approach, characterized by the features: (a) At least $[\log _2 N] + 2$ different values are needed for implementing the process. (b) The bits forming the binary representation of the specified location are recovered sequentially (starting with the least significant bit). A new approach in assigning values to elements, for the purpose of recovering efficiently their location, is presented in this paper, for the case where N is of the form $2^n - 1$. Its main features are (a) less than $[\log _2 N] + 2$ different values are sufficient for achieving this task (even 2 are enough!). (b) The bits forming the binary representation of the specified location are recovered in parallel. This is achieved by very simple means, where the value of each bit in the binary representation is recovered by considering the numerical values assigned to 4 elements having fixed location with respect to the element whose location is to be found.
Benjamin Arazi
SIAM J. Comput.1
1985 An electrooptical adder
abstract
A prototype for a binary adder, in which the carry propagation is handled by light signals is suggested, thus enabling a fast execution of addition operation even for large operands.
Benjamin Arazi
Proc. IEEE1
1984 An Approach for Generating Different Types of Gray Codes
Benjamin Arazi
Inf. Control.1
1983 Automatic handwriting identification based on the external properties of the samples
abstract
A handwriting sample is identified by comparing its features to the corresponding features of a list of handwriting samples contained in a reference library. Some of the needed features are extracted from the structure of specific parts of the handwriting's sample which have to be identified first (e.g., specific letters). Other features are extracted from the external structure of the handwriting (e.g., margins). Due to their described property, these features are extracted automatically with relative ease. Techniques for extracting features of the described kind are presented in this work. Experimental results obtained when using the extracted features for identification purposes are then given.
Benjamin Arazi
IEEE Trans. Syst. Man Cybern.1
1981 On the Synthesis of de-Bruijn Sequences
Benjamin Arazi
Inf. Control.1
1980 A trapdoor multiple mapping (Corresp.)
abstract
A public key cryptosystem is suggested in which a message is enciphered by adding its numerical value to a sum of elements selected randomly from a publicly known knapsack, thus enabling multiple mapping of the message. Data expansion is moderate while reasonable security is maintained. Since the selected knapsack elements are message-independent, the encryption is very fast.
Benjamin Arazi
IEEE Trans. Inf. Theory1
1978 The Optimal Burst-Error Correction Capability of the Codes Generated by f(X) = (X^p+1)(X^q+1)/(X+1)
Benjamin Arazi
Inf. Control.1
1978 The Fadeogram, A Sonogram-Like Display of the Time-Varying Frequency Response of HF-SSB Radio Channels
abstract
A method is presented for displaying the time-varying transfer characteristic of communication channels, and is illustrated by showing in detail the behavior of an HF-SSB radio channel during one minute periods, under the various fading characteristics classified by USAEL. It is also demonstrated how this method aided study of the causes of errors in data received by digital modems.
J. H. J. Filter, Benjamin Arazi, R. G. W. Thomson
IEEE Trans. Commun.2
1977 Self Synchronizing Digital Scramblers
abstract
A known way of scrambling binary data for security purposes is by adding to it, bit by bit, a pseudorandom sequence A. Synchronization is established by providing the descrambler with the states of A's generator. It is shown here how for data transmitted in blocks, the states of the generator can be recovered at any instant which enables self-synchronization. If the block length iskand the generator of A consists of ann-stage register, there is a delay ofk(n - 1) + 1bits, between sync lost and sync recovery.
Benjamin Arazi
IEEE Trans. Commun.1
1976 Improving the Throughput of an ARQ Stop and Wait Scheme for Burst Noise Channels
abstract
The repeat request codeword in an ARQ data transmission can be the detected error syndrome. In that case, there exists an optimal single-burst detecting scheme which improves the throughput of a Stop and Wait scheme, especially under high error rate conditions.
Benjamin Arazi
IEEE Trans. Commun.1
1975 An Optimal Coding Scheme for a Certain Type of Ensemble
abstract
An optimal coding scheme is offered for binary messages with a limited number of successive runs of length 1 (i.e., strings of the form 010101..., in the messages, have a known limited length). A practical example is given of a case where such messages are found.
Benjamin Arazi
IEEE Trans. Commun.1
1974 Hadamard Transforms of Magnified, Expanded, and Periodic Signals
abstract
A simple connection is shown to exist between the Hadamard transforms of a discrete signalAand a signalBobtained fromAin three different ways: a) time scaling ofA; b) expandingAby means of zero insertion; and c) lettingArepeat itself. Both one-dimensional and two-dimensional cases are investigated.
Benjamin Arazi
IEEE Trans. Commun.1